From 3ae4f8f2de7494411e5278b11dd7db1c0ae7389f Mon Sep 17 00:00:00 2001 From: Tim 'mithro' Ansell Date: Sun, 23 Feb 2020 14:54:07 -0800 Subject: [PATCH] Adding missing vexriscv CPU. --- litex_setup.py | 1 + 1 file changed, 1 insertion(+) diff --git a/litex_setup.py b/litex_setup.py index ffd8fd76..ff2777bf 100755 --- a/litex_setup.py +++ b/litex_setup.py @@ -43,6 +43,7 @@ repos = [ ("litex-data-cpu-microwatt", ("https://github.com/litex-hub/", False, True)), ("litex-data-cpu-picorv32", ("https://github.com/litex-hub/", False, True)), ("litex-data-cpu-rocket", ("https://github.com/litex-hub/", False, True)), + ("litex-data-cpu-vexriscv", ("https://github.com/litex-hub/", False, True)), ("litex-data-misc-tapcfg", ("https://github.com/litex-hub/", False, True)), ] repos = OrderedDict(repos) -- 2.30.2