From 3ae9ebab52f78e84375e0af00e3107fef89181b5 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 14 Nov 2021 18:20:28 +0000
Subject: [PATCH]

---
 docs/pinmux.mdwn | 1 +
 1 file changed, 1 insertion(+)

diff --git a/docs/pinmux.mdwn b/docs/pinmux.mdwn
index 1d340f226..4dfde8ba4 100644
--- a/docs/pinmux.mdwn
+++ b/docs/pinmux.mdwn
@@ -5,6 +5,7 @@ Links:
 * <http://www2.eng.cam.ac.uk/~dmh/4b7/resource/section14.htm>
 * <https://ftp.libre-soc.org/Pin_Control_Subsystem_Overview.pdf>
 * <https://bugs.libre-soc.org/show_bug.cgi?id=50>
+* <https://git.libre-soc.org/?p=c4m-jtag.git;a=tree;hb=HEAD>
 
 Managing IO on an ASIC is nowhere near as simple as on an FPGA.
 An FPGA has built-in IO Pads, the wires terminate inside an
-- 
2.30.2