From 3aee58f484a7b659b0d002f0e554a8d8bb87afbe Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Wed, 18 Mar 2015 18:54:22 +0100 Subject: [PATCH] mibuild/lattice/diamond: add verilog include path (thanks Lattice's FAE since it's not documented) --- mibuild/lattice/diamond.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/mibuild/lattice/diamond.py b/mibuild/lattice/diamond.py index dbbc99ae..3a12456c 100644 --- a/mibuild/lattice/diamond.py +++ b/mibuild/lattice/diamond.py @@ -40,6 +40,8 @@ def _build_lpf(named_sc, named_pc): def _build_files(device, sources, vincpaths, build_name): tcl = [] tcl.append("prj_project new -name \"%s\" -impl \"implementation\" -dev %s -synthesis \"synplify\"" %(build_name, device)) + for path in vincpaths: + tcl.append("prj_impl option {include path} {\"" + path.replace("\\", "/") + "\"}") for filename, language in sources: tcl.append("prj_src add \"" + filename.replace("\\", "/") + "\"") tcl.append("prj_run Synthesis -impl implementation -forceOne") -- 2.30.2