From 3b0eee5d58175e688fe3fe6f7538db7b96e7f9b8 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sat, 27 Aug 2011 12:44:00 +0200 Subject: [PATCH] sse.md (*absneg2): Fix split condition. * config/i386/sse.md (*absneg2): Fix split condition. (vec_extract_lo_): Prevent both operands in memory. (vec_extract_lo_v16hi): Ditto. (*vec_extract_v4sf_mem): Add TARGET_SSE insn constraint. * config/i386/sse.md (mulv16qi3): Attach REG_EQUAL note. (*sse2_mulv4si3): Ditto. (mulv2di3): Ditto. * config/i386/i386.c (legitimize_tls_address): Change REG_EQIV notes to REG_EQUAL. From-SVN: r178132 --- gcc/ChangeLog | 17 ++++++++++++++++- gcc/config/i386/i386.c | 8 ++++---- gcc/config/i386/sse.md | 23 ++++++++++++++++------- 3 files changed, 36 insertions(+), 12 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 659bb0ec5ea..b1cde85e4a7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,9 +1,24 @@ +2011-08-27 Uros Bizjak + + * config/i386/sse.md (*absneg2): Fix split condition. + (vec_extract_lo_): Prevent both operands in memory. + (vec_extract_lo_v16hi): Ditto. + (*vec_extract_v4sf_mem): Add TARGET_SSE insn constraint. + +2011-08-27 Uros Bizjak + + * config/i386/sse.md (mulv16qi3): Attach REG_EQUAL note. + (*sse2_mulv4si3): Ditto. + (mulv2di3): Ditto. + * config/i386/i386.c (legitimize_tls_address): Change REG_EQIV + notes to REG_EQUAL. + 2011-08-27 Uros Bizjak PR target/50202 * config/i386/sse.md (sse4_2_pcmpestr): Emit NOTE_INSN_DELETED note when all outputs are unused. - (sse4_2_pcmpestr): Ditto. + (sse4_2_pcmpistr): Ditto. 2011-08-26 Uros Bizjak diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 3a8b0818796..bfb42a4e421 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -12268,7 +12268,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) tp = get_thread_pointer (true); dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, tp, dest)); - set_unique_reg_note (get_last_insn (), REG_EQUIV, x); + set_unique_reg_note (get_last_insn (), REG_EQUAL, x); } else { @@ -12315,7 +12315,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) emit_insn (gen_tls_dynamic_gnu2_32 (base, tmp, pic)); tp = get_thread_pointer (true); - set_unique_reg_note (get_last_insn (), REG_EQUIV, + set_unique_reg_note (get_last_insn (), REG_EQUAL, gen_rtx_MINUS (Pmode, tmp, tp)); } else @@ -12331,7 +12331,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) insns = get_insns (); end_sequence (); - /* Attach a unique REG_EQUIV, to allow the RTL optimizers to + /* Attach a unique REG_EQUAL, to allow the RTL optimizers to share the LD_BASE result with other LD model accesses. */ eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLS_LD_BASE); @@ -12352,7 +12352,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) { dest = force_reg (Pmode, gen_rtx_PLUS (Pmode, dest, tp)); - set_unique_reg_note (get_last_insn (), REG_EQUIV, x); + set_unique_reg_note (get_last_insn (), REG_EQUAL, x); } break; diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 0c7daf257ad..fa22e9a11db 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -648,7 +648,7 @@ (use (match_operand:VF 2 "nonimmediate_operand" "xm,0, xm,x"))] "TARGET_SSE" "#" - "reload_completed" + "&& reload_completed" [(const_int 0)] { enum rtx_code absneg_op; @@ -3708,7 +3708,7 @@ (vec_select: (match_operand:VI8F_256 1 "nonimmediate_operand" "xm,x") (parallel [(const_int 0) (const_int 1)])))] - "TARGET_AVX" + "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" [(const_int 0)] @@ -3742,7 +3742,7 @@ (match_operand:VI4F_256 1 "nonimmediate_operand" "xm,x") (parallel [(const_int 0) (const_int 1) (const_int 2) (const_int 3)])))] - "TARGET_AVX" + "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" [(const_int 0)] @@ -3779,7 +3779,7 @@ (const_int 2) (const_int 3) (const_int 4) (const_int 5) (const_int 6) (const_int 7)])))] - "TARGET_AVX" + "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" [(const_int 0)] @@ -3822,7 +3822,7 @@ (const_int 10) (const_int 11) (const_int 12) (const_int 13) (const_int 14) (const_int 15)])))] - "TARGET_AVX" + "TARGET_AVX && !(MEM_P (operands[0]) && MEM_P (operands[1]))" "#" "&& reload_completed" [(const_int 0)] @@ -3876,9 +3876,9 @@ (vec_select:SF (match_operand:V4SF 1 "memory_operand" "o") (parallel [(match_operand 2 "const_0_to_3_operand" "n")])))] - "" + "TARGET_SSE" "#" - "reload_completed" + "&& reload_completed" [(const_int 0)] { int i = INTVAL (operands[2]); @@ -4726,6 +4726,9 @@ /* Extract the even bytes and merge them back together. */ ix86_expand_vec_extract_even_odd (operands[0], t[5], t[4], 0); + + set_unique_reg_note (get_last_insn (), REG_EQUAL, + gen_rtx_MULT (V16QImode, operands[1], operands[2])); DONE; }) @@ -5179,6 +5182,9 @@ /* Merge the parts back together. */ emit_insn (gen_vec_interleave_lowv4si (op0, t5, t6)); + + set_unique_reg_note (get_last_insn (), REG_EQUAL, + gen_rtx_MULT (V4SImode, operands[1], operands[2])); DONE; }) @@ -5261,6 +5267,9 @@ emit_insn (gen_addv2di3 (t6, t1, t4)); emit_insn (gen_addv2di3 (op0, t6, t5)); } + + set_unique_reg_note (get_last_insn (), REG_EQUAL, + gen_rtx_MULT (V2DImode, operands[1], operands[2])); DONE; }) -- 2.30.2