From 3b3324a667ad9d4f5ff666d95645d65427ee2a08 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Tue, 25 Apr 2023 17:24:26 +0100
Subject: [PATCH]

---
 openpower/sv/cr_int_predication.mdwn | 38 ++++++++++++----------------
 1 file changed, 16 insertions(+), 22 deletions(-)

diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn
index 53b0965cb..09183adbd 100644
--- a/openpower/sv/cr_int_predication.mdwn
+++ b/openpower/sv/cr_int_predication.mdwn
@@ -33,7 +33,7 @@ CW2-Form
 * crrweird. RT,BFA,M,fmsk,fmap (Rc=1)
 
 ```
-    creg = CR{BFA}
+    creg = CR[4*BFA+32:4*BFA+35] 
     n0 = fmsk[0] & (fmap[0] == creg[0])
     n1 = fmsk[1] & (fmap[1] == creg[1])
     n2 = fmsk[2] & (fmap[2] == creg[2])
@@ -75,7 +75,7 @@ CW2-Form
 ```
     
 
-    creg = CR{BFA}
+    creg = CR[4*BFA+32:4*BFA+35] 
     n0 = fmsk[0] & (fmap[0] == creg[0])
     n1 = fmsk[1] & (fmap[1] == creg[1])
     n2 = fmsk[2] & (fmap[2] == creg[2])
@@ -114,8 +114,8 @@ into the destination.  *Destination elwidth overrides still apply*
     n3 = fmsk[3] & (fmap[3] == a[60])
     result = n0 || n1 || n2 || n3
     if M:
-        result |= CR{BF} & ~fmsk
-    CR{BF} = result
+        result |= CR[4*BF+32:4*BF+35]  & ~fmsk
+    CR[4*BF+32:4*BF+35]  = result
 ```
 
 When used with SVP64 Prefixing this is a [[sv/normal]]
@@ -127,19 +127,19 @@ on the `BF` CR Field. When M=0 it is a more normal Write.
 
 ## mtcrweird
 
-```
-    mtcrweird: BF,RA,M,fmsk,fmap
+* mtcrweird BF,RA,M,fmsk,fmap
 
+```
     reg = (RA|0)
-    lsb = reg[63] # MSB0 numbering
+    lsb = reg[63] # MSB0 numbering, the LSB
     n0 = fmsk[0] & (fmap[0] == lsb)
     n1 = fmsk[1] & (fmap[1] == lsb)
     n2 = fmsk[2] & (fmap[2] == lsb)
     n3 = fmsk[3] & (fmap[3] == lsb)
     result = n0 || n1 || n2 || n3
     if M:
-        result |= CR{BF} & ~fmsk
-    CR{BF} = result
+        result |= CR[4*BF+32:4*BF+35] & ~fmsk
+    CR[4*BF+32:4*BF+35]  = result
 ```
 
 Note that when M=1 this operation is a Read-Modify-Write on the CR Field
@@ -172,11 +172,12 @@ destination (optionally inverted, set, or cleared).
 ```
     mcrfm: BF,BFA,M,fmsk,fmap
 
-    result = fmsk & CR{BFA}
+    result = fmsk & CR[4*BFA+32:4*BFA+35] 
+    CR{BF} = result
     if M:
-        result |= CR{BF} & ~fmsk
+        result |= CR[4*BF+32:4*BF+35]  & ~fmsk
     result ^= fmap
-    CR{BF} = result
+    CR[4*BF+32:4*BF+35]  = result
 ```
 
 When M=1 this operation is a Read-Modify-Write on the CR Field
@@ -207,17 +208,10 @@ individual bits in BF may be set to 1 by ensuring that the required bit of
 ```
     crweirder: BT,BFA,fmsk,fmap
 
-    creg = CR{BFA}
-    n0 = fmsk[0] & (fmap[0] == creg[0])
-    n1 = fmsk[1] & (fmap[1] == creg[1])
-    n2 = fmsk[2] & (fmap[2] == creg[2])
-    n3 = fmsk[3] & (fmap[3] == creg[3])
-
-    n = (n0||n1||n2||n3) & fmsk
+    creg = CR[4*BFA+32:4*BFA+35]
+    n = (¬fmap ^ creg) & fmsk
     result = (n != 0) if M else (n == fmsk)
-    bf = BT[2:4] # select CR field
-    bit = BT[0:1] # select bit of CR field
-    CR{bf}[bit] = result # aka the usual "CR[32+BT] = result"
+    CR[32+BT] = result
 ```
 
 When used with SVP64 Prefixing this is a [[sv/cr_ops]] SVP64
-- 
2.30.2