From 3b47f4cc104bd8ab91eb1d72faf129f13f94b3c0 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Tue, 1 Dec 2015 16:10:45 +0000 Subject: [PATCH] rs6000.c (const_load_sequence_p): Handle extra indirection for large and small code models. [gcc] 2015-12-01 Bill Schmidt * config/rs6000/rs6000.c (const_load_sequence_p): Handle extra indirection for large and small code models. (adjust_vperm): Likewise. [gcc/testsuite] 2015-12-01 Bill Schmidt * gcc.target/powerpc/swaps-p8-22.c: New. From-SVN: r231119 --- gcc/ChangeLog | 6 ++++ gcc/config/rs6000/rs6000.c | 18 ++++++++++-- gcc/testsuite/ChangeLog | 4 +++ .../gcc.target/powerpc/swaps-p8-22.c | 29 +++++++++++++++++++ 4 files changed, 55 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ce77e8bb2f7..e582c8aa656 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2015-12-01 Bill Schmidt + + * config/rs6000/rs6000.c (const_load_sequence_p): Handle extra + indirection for large and small code models. + (adjust_vperm): Likewise. + 2015-12-01 Julian Brown Cesar Philippidis James Norris diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index c4e3f2fb538..d451d7686cc 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -36613,7 +36613,12 @@ const_load_sequence_p (swap_web_entry *insn_entry, rtx insn) rtx base, offset; if (GET_CODE (tocrel_body) != SET) return false; - if (!toc_relative_expr_p (SET_SRC (tocrel_body), false)) + /* There is an extra level of indirection for small/large + code models. */ + rtx tocrel_expr = SET_SRC (tocrel_body); + if (GET_CODE (tocrel_expr) == MEM) + tocrel_expr = XEXP (tocrel_expr, 0); + if (!toc_relative_expr_p (tocrel_expr, false)) return false; split_const (XVECEXP (tocrel_base, 0, 0), &base, &offset); if (GET_CODE (base) != SYMBOL_REF || !CONSTANT_POOL_ADDRESS_P (base)) @@ -37294,10 +37299,19 @@ adjust_vperm (rtx_insn *insn) to set tocrel_base; otherwise it would be unnecessary as we've already established it will return true. */ rtx base, offset; - if (!toc_relative_expr_p (SET_SRC (PATTERN (tocrel_insn)), false)) + rtx tocrel_expr = SET_SRC (PATTERN (tocrel_insn)); + /* There is an extra level of indirection for small/large code models. */ + if (GET_CODE (tocrel_expr) == MEM) + tocrel_expr = XEXP (tocrel_expr, 0); + if (!toc_relative_expr_p (tocrel_expr, false)) gcc_unreachable (); split_const (XVECEXP (tocrel_base, 0, 0), &base, &offset); rtx const_vector = get_pool_constant (base); + /* With the extra indirection, get_pool_constant will produce the + real constant from the reg_equal expression, so get the real + constant. */ + if (GET_CODE (const_vector) == SYMBOL_REF) + const_vector = get_pool_constant (const_vector); gcc_assert (GET_CODE (const_vector) == CONST_VECTOR); /* Create an adjusted mask from the initial mask. */ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e009034c675..44055d19adf 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2015-12-01 Bill Schmidt + + * gcc.target/powerpc/swaps-p8-22.c: New. + 2015-12-01 Marek Polacek PR tree-optimization/67916 diff --git a/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c b/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c new file mode 100644 index 00000000000..4be217b3dd1 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/swaps-p8-22.c @@ -0,0 +1,29 @@ +/* { dg-do compile { target { powerpc64le-*-* } } } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } +/* { dg-options "-O2 -mcpu=power8 -maltivec -mcmodel=large" } */ + +/* The expansion for vector character multiply introduces a vperm operation. + This tests that changing the vperm mask allows us to remove all swaps + from the generated code. It is a duplicate of swaps-p8-21.c, except + that it applies the large code model, which requires an extra indirection + in the load of the constant mask. */ + +#include + +void abort (); + +vector unsigned char r; +vector unsigned char v = + { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; +vector unsigned char i = + { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }; + +int main () +{ + int j; + r = v * i; + return 0; +} + +/* { dg-final { scan-assembler-times "vperm" 1 } } */ +/* { dg-final { scan-assembler-not "xxpermdi" } } */ -- 2.30.2