From 3b5de3cb71e0771ee5f1abe88ad63e7613699b66 Mon Sep 17 00:00:00 2001 From: Bill Schmidt Date: Thu, 26 Jan 2017 03:21:49 +0000 Subject: [PATCH] vsx-elemrev-4.c: Change expected code generation to accept D-mode memory accesses. 2017-01-25 Bill Schmidt * gcc.target/powerpc/vsx-elemrev-4.c: Change expected code generation to accept D-mode memory accesses. From-SVN: r244916 --- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c | 7 +++++-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 6a3007331d0..99bec45d5a7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-01-25 Bill Schmidt + + * gcc.target/powerpc/vsx-elemrev-4.c: Change expected code + generation to accept D-mode memory accesses. + 2017-01-25 Martin Sebor PR c++/71290 diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c index a116316c174..f40946353e4 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c +++ b/gcc/testsuite/gcc.target/powerpc/vsx-elemrev-4.c @@ -3,8 +3,11 @@ /* { dg-options "-mcpu=power9 -O0" } */ /* { dg-require-effective-target powerpc_p9vector_ok } */ /* { dg-skip-if "" { powerpc*-*-aix* } { "*" } { "" } } */ -/* { dg-final { scan-assembler-times "lxvx" 40 } } */ -/* { dg-final { scan-assembler-times "stxvx" 40 } } */ + +/* Following will match either lxv or lxvx, either stxv or stxvx. + This is purposeful as either is fine. */ +/* { dg-final { scan-assembler-times "lxv" 40 } } */ +/* { dg-final { scan-assembler-times "stxv" 40 } } */ #include -- 2.30.2