From 3bbcecc27997017e2f4df9b5ea708604fbdf9c94 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 13 Sep 2020 12:39:33 +0100 Subject: [PATCH] clarify --- src/unused/TLB/ariane/plru.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/unused/TLB/ariane/plru.py b/src/unused/TLB/ariane/plru.py index 70e21268..e99d56d9 100644 --- a/src/unused/TLB/ariane/plru.py +++ b/src/unused/TLB/ariane/plru.py @@ -23,8 +23,8 @@ class PLRU(Elaboratable): def __init__(self, BITS): self.BITS = BITS self.acc_en = Signal(BITS) - self.lru_o = Signal(BITS) self.acc_i = Signal() + self.lru_o = Signal(BITS) def elaborate(self, platform=None): m = Module() @@ -49,7 +49,7 @@ class PLRU(Elaboratable): # endcase LOG_TLB = log2_int(self.BITS) - hit = Signal(self.BITS) + hit = Signal(self.BITS, reset_less=True) m.d.comb += hit.eq(Repl(self.acc_i, self.BITS) & self.acc_en) for i in range(self.BITS): -- 2.30.2