From 3c67b67326c4284c79edc1c7aa0579351d85f5f6 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Wed, 31 May 1995 20:50:20 -0400 Subject: [PATCH] (all movstri recognizers): Eliminate updating the pointers. From-SVN: r9855 --- gcc/config/rs6000/rs6000.md | 298 ++++++++++++------------------------ 1 file changed, 94 insertions(+), 204 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 7e5f3745a1a..19d53d4c7b7 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -4732,12 +4732,6 @@ (define_expand "movstrsi_8reg" [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" ""))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) (use (match_operand:SI 2 "immediate_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) (clobber (reg:SI 5)) @@ -4748,22 +4742,16 @@ (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 5 ""))])] + (clobber (match_scratch:SI 4 ""))])] "TARGET_STRING" "") (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 6)) (clobber (reg:SI 7)) (clobber (reg:SI 8)) @@ -4771,29 +4759,21 @@ (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "=q,q"))] + (clobber (match_scratch:SI 5 "=q"))] "TARGET_STRING && TARGET_POWER && ((INTVAL (operands[2]) > 24 && INTVAL (operands[2]) < 32) || INTVAL (operands[2]) == 0) && (REGNO (operands[0]) < 5 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 5 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 5" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 5" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 6)) (clobber (reg:SI 7)) (clobber (reg:SI 8)) @@ -4801,28 +4781,20 @@ (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "X,X"))] + (clobber (match_scratch:SI 5 "X"))] "TARGET_STRING && !TARGET_POWER && ((INTVAL (operands[2]) > 24 && INTVAL (operands[2]) < 32) || INTVAL (operands[2]) == 0) && (REGNO (operands[0]) < 5 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 5 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 5" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 5" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) ;; Move up to 24 bytes at a time. The fixed registers are needed because the ;; register allocator doesn't have a clue about allocating 6 word registers (define_expand "movstrsi_6reg" [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" ""))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) (use (match_operand:SI 2 "immediate_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) (clobber (reg:SI 7)) @@ -4831,252 +4803,170 @@ (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 5 ""))])] + (clobber (match_scratch:SI 4 ""))])] "TARGET_STRING" "") (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 8)) (clobber (reg:SI 9)) (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "=q,q"))] + (clobber (match_scratch:SI 5 "=q"))] "TARGET_STRING && TARGET_POWER && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 24 && (REGNO (operands[0]) < 7 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 7 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 7" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 7" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 8)) (clobber (reg:SI 9)) (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "X,X"))] + (clobber (match_scratch:SI 5 "X"))] "TARGET_STRING && !TARGET_POWER && INTVAL (operands[2]) > 16 && INTVAL (operands[2]) <= 32 && (REGNO (operands[0]) < 7 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 7 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 7" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 7" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) ;; Move up to 16 bytes at a time, using 4 fixed registers to avoid spill problems ;; with TImode (define_expand "movstrsi_4reg" [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" ""))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) (use (match_operand:SI 2 "immediate_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) (clobber (reg:SI 9)) (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 5 ""))])] + (clobber (match_scratch:SI 4 ""))])] "TARGET_STRING" "") (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "=q,q"))] + (clobber (match_scratch:SI 5 "=q"))] "TARGET_STRING && TARGET_POWER && INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16 && (REGNO (operands[0]) < 9 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 9 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 9" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 9" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_operand:SI 5 "register_operand" "r,r")) + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_operand:SI 4 "register_operand" "=r")) (clobber (reg:SI 10)) (clobber (reg:SI 11)) (clobber (reg:SI 12)) - (clobber (match_scratch:SI 6 "X,X"))] + (clobber (match_scratch:SI 5 "X"))] "TARGET_STRING && !TARGET_POWER && INTVAL (operands[2]) > 8 && INTVAL (operands[2]) <= 16 && (REGNO (operands[0]) < 9 || REGNO (operands[0]) > 12) && (REGNO (operands[1]) < 9 || REGNO (operands[1]) > 12) - && REGNO (operands[5]) == 9" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && REGNO (operands[4]) == 9" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) ;; Move up to 8 bytes at a time. (define_expand "movstrsi_2reg" [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" ""))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) (use (match_operand:SI 2 "immediate_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) - (clobber (match_scratch:DI 5 "")) - (clobber (match_scratch:SI 6 ""))])] + (clobber (match_scratch:DI 4 "")) + (clobber (match_scratch:SI 5 ""))])] "TARGET_STRING && !TARGET_64BIT" "") (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_scratch:DI 5 "=&r,&r")) - (clobber (match_scratch:SI 6 "=q,q"))] + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_scratch:DI 4 "=&r")) + (clobber (match_scratch:SI 5 "=q"))] "TARGET_STRING && TARGET_POWER && !TARGET_64BIT - && INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + && INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8" + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_scratch:DI 5 "=&r,&r")) - (clobber (match_scratch:SI 6 "X,X"))] + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_scratch:DI 4 "=&r")) + (clobber (match_scratch:SI 5 "X"))] "TARGET_STRING && !TARGET_POWER && !TARGET_64BIT && INTVAL (operands[2]) > 4 && INTVAL (operands[2]) <= 8" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) ;; Move up to 4 bytes at a time. (define_expand "movstrsi_1reg" [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" "")) (mem:BLK (match_operand:SI 1 "register_operand" ""))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" ""))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) (use (match_operand:SI 2 "immediate_operand" "")) (use (match_operand:SI 3 "immediate_operand" "")) - (clobber (match_scratch:SI 5 "")) - (clobber (match_scratch:SI 6 ""))])] + (clobber (match_scratch:SI 4 "")) + (clobber (match_scratch:SI 5 ""))])] "TARGET_STRING" "") (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_scratch:SI 5 "=&r,&r")) - (clobber (match_scratch:SI 6 "=q,q"))] + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_scratch:SI 4 "=&r")) + (clobber (match_scratch:SI 5 "=q"))] "TARGET_STRING && TARGET_POWER && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 4" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) (define_insn "" - [(set (mem:BLK (match_operand:SI 0 "register_operand" "+&b,&b")) - (mem:BLK (match_operand:SI 1 "register_operand" "+&b,&b"))) - (set (match_dup 0) - (plus:SI (match_dup 0) - (match_operand:SI 4 "immediate_operand" "O,i"))) - (set (match_dup 1) - (plus:SI (match_dup 1) - (match_dup 4))) - (use (match_operand:SI 2 "immediate_operand" "i,i")) - (use (match_operand:SI 3 "immediate_operand" "i,i")) - (clobber (match_scratch:SI 5 "=&r,&r")) - (clobber (match_scratch:SI 6 "X,X"))] + [(set (mem:BLK (match_operand:SI 0 "register_operand" "b")) + (mem:BLK (match_operand:SI 1 "register_operand" "b"))) + (use (match_operand:SI 2 "immediate_operand" "i")) + (use (match_operand:SI 3 "immediate_operand" "i")) + (clobber (match_scratch:SI 4 "=&r")) + (clobber (match_scratch:SI 5 "X"))] "TARGET_STRING && !TARGET_POWER && INTVAL (operands[2]) > 0 && INTVAL (operands[2]) <= 4" - "@ - {lsi|lswi} %5,%1,%2\;{stsi|stswi} %5,%0,%2 - {lsi|lswi} %5,%1,%2\;{cal %0,%4(%0)|addi %0,%0,%4}\;{stsi|stswi} %5,%0,%2\;{cal %1,%4(%1)|addi %1,%1,%4}" - [(set_attr "length" "8,16")]) + "{lsi|lswi} %4,%1,%2\;{stsi|stswi} %4,%0,%2" + [(set_attr "length" "8")]) ;; Define insns that do load or store with update. Some of these we can -- 2.30.2