From 3c7071a6be21fc0c87753758fc09ff28890edc99 Mon Sep 17 00:00:00 2001 From: Ali Saidi Date: Sun, 9 May 2004 20:14:18 -0400 Subject: [PATCH] Added ULL for 64bit ints Added function to skip determine_cpu_caches(). We may have to update this in the future: see note below. arch/alpha/alpha_memory.cc: dev/ide_ctrl.cc: dev/tsunamireg.h: Added ULL for 64bit ints kern/linux/linux_system.cc: Added a function to skip determine_cpu_caches, right now it is only used for printing in proc, however in the future we may either want to implement the SC_CTL IPR register or manually set alpha_l1i_cacheshape, alpha_l1d_cacheshape, alpha_l2_cacheshape, alpha_l3_cacheshape to ((size << 10) | (linesize>>1)<<4 | way) kern/linux/linux_system.hh: added event to skip determine_cpu_caches() --HG-- extra : convert_revision : 1065f2091bbe6832b730af490f5b4672c2afedce --- arch/alpha/alpha_memory.cc | 8 ++++---- dev/ide_ctrl.cc | 10 +++++----- dev/tsunamireg.h | 6 +++--- kern/linux/linux_system.cc | 5 +++++ kern/linux/linux_system.hh | 1 + 5 files changed, 18 insertions(+), 12 deletions(-) diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index cddee3b22..4cd122431 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -331,9 +331,9 @@ AlphaItb::translate(MemReqPtr &req) const // sign extend the physical address properly if (req->paddr & PA_UNCACHED_BIT_39 || req->paddr & PA_UNCACHED_BIT_40) - req->paddr |= 0xf0000000000; + req->paddr |= 0xf0000000000ULL; else - req->paddr &= 0xffffffffff; + req->paddr &= 0xffffffffffULL; } else { // not a physical address: need to look up pte @@ -520,9 +520,9 @@ AlphaDtb::translate(MemReqPtr &req, bool write) const // sign extend the physical address properly if (req->paddr & PA_UNCACHED_BIT_39 || req->paddr & PA_UNCACHED_BIT_40) - req->paddr |= 0xf0000000000; + req->paddr |= 0xf0000000000ULL; else - req->paddr &= 0xffffffffff; + req->paddr &= 0xffffffffffULL; } else { if (write) diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc index 7507a8d7f..f038aceca 100644 --- a/dev/ide_ctrl.cc +++ b/dev/ide_ctrl.cc @@ -291,7 +291,7 @@ IdeController::WriteConfig(int offset, int size, uint32_t data) pioInterface->addAddrRange(pri_cmd_addr, pri_cmd_addr + pri_cmd_size - 1); - pri_cmd_addr = ((pri_cmd_addr | 0xf0000000000) & PA_IMPL_MASK); + pri_cmd_addr = ((pri_cmd_addr | 0xf0000000000ULL) & PA_IMPL_MASK); break; case PCI0_BASE_ADDR1: @@ -300,7 +300,7 @@ IdeController::WriteConfig(int offset, int size, uint32_t data) pioInterface->addAddrRange(pri_ctrl_addr, pri_ctrl_addr + pri_ctrl_size - 1); - pri_ctrl_addr = ((pri_ctrl_addr | 0xf0000000000) & PA_IMPL_MASK); + pri_ctrl_addr = ((pri_ctrl_addr | 0xf0000000000ULL) & PA_IMPL_MASK); break; case PCI0_BASE_ADDR2: @@ -309,7 +309,7 @@ IdeController::WriteConfig(int offset, int size, uint32_t data) pioInterface->addAddrRange(sec_cmd_addr, sec_cmd_addr + sec_cmd_size - 1); - sec_cmd_addr = ((sec_cmd_addr | 0xf0000000000) & PA_IMPL_MASK); + sec_cmd_addr = ((sec_cmd_addr | 0xf0000000000ULL) & PA_IMPL_MASK); break; case PCI0_BASE_ADDR3: @@ -318,7 +318,7 @@ IdeController::WriteConfig(int offset, int size, uint32_t data) pioInterface->addAddrRange(sec_ctrl_addr, sec_ctrl_addr + sec_ctrl_size - 1); - sec_ctrl_addr = ((sec_ctrl_addr | 0xf0000000000) & PA_IMPL_MASK); + sec_ctrl_addr = ((sec_ctrl_addr | 0xf0000000000ULL) & PA_IMPL_MASK); break; case PCI0_BASE_ADDR4: @@ -326,7 +326,7 @@ IdeController::WriteConfig(int offset, int size, uint32_t data) if (pioInterface) pioInterface->addAddrRange(bmi_addr, bmi_addr + bmi_size - 1); - bmi_addr = ((bmi_addr | 0xf0000000000) & PA_IMPL_MASK); + bmi_addr = ((bmi_addr | 0xf0000000000ULL) & PA_IMPL_MASK); break; } } diff --git a/dev/tsunamireg.h b/dev/tsunamireg.h index c74279ecf..1207ebf9f 100644 --- a/dev/tsunamireg.h +++ b/dev/tsunamireg.h @@ -2,7 +2,7 @@ #ifndef __TSUNAMIREG_H__ #define __TSUNAMIREG_H__ -#define ALPHA_K0SEG_BASE 0xfffffc0000000000 +#define ALPHA_K0SEG_BASE 0xfffffc0000000000ULL // CChip Registers #define TSDEV_CC_CSR 0x00 @@ -101,8 +101,8 @@ #define RTC_CONTROL_REGISTERD 13 // control register D #define RTC_REGNUMBER_RTC_CR1 0x6A // control register 1 -#define PCHIP_PCI0_MEMORY 0x10000000000 -#define PCHIP_PCI0_IO 0x101FC000000 +#define PCHIP_PCI0_MEMORY 0x10000000000ULL +#define PCHIP_PCI0_IO 0x101FC000000ULL #define TSUNAMI_PCI0_MEMORY ALPHA_K0SEG_BASE + PCHIP_PCI0_MEMORY #define TSUNAMI_PCI0_IO ALPHA_K0SEG_BASE + PCHIP_PCI0_IO diff --git a/kern/linux/linux_system.cc b/kern/linux/linux_system.cc index 8bfad0996..fe39380be 100644 --- a/kern/linux/linux_system.cc +++ b/kern/linux/linux_system.cc @@ -230,6 +230,8 @@ LinuxSystem::LinuxSystem(const string _name, const uint64_t _init_param, skipDelayLoopEvent = new LinuxSkipDelayLoopEvent(&pcEventQueue, "calibrate_delay"); + skipCacheProbeEvent = new LinuxSkipFuncEvent(&pcEventQueue, "determine_cpu_caches"); + /* debugPrintfEvent = new DebugPrintfEvent(&pcEventQueue, "debug_printf", false); debugPrintfrEvent = new DebugPrintfEvent(&pcEventQueue, @@ -342,6 +344,9 @@ LinuxSystem::LinuxSystem(const string _name, const uint64_t _init_param, if (kernelSymtab->findAddress("calibrate_delay", addr)) skipDelayLoopEvent->schedule(addr+8); + if (kernelSymtab->findAddress("determine_cpu_caches", addr)) + skipCacheProbeEvent->schedule(addr+8); + #if TRACING_ON if (kernelSymtab->findAddress("printk", addr)) printfEvent->schedule(addr); diff --git a/kern/linux/linux_system.hh b/kern/linux/linux_system.hh index 53800db29..8b07bedf7 100644 --- a/kern/linux/linux_system.hh +++ b/kern/linux/linux_system.hh @@ -102,6 +102,7 @@ class LinuxSystem : public System LinuxBadAddrEvent *badaddrEvent; LinuxSkipFuncEvent *skipPowerStateEvent; LinuxSkipFuncEvent *skipScavengeBootEvent; + LinuxSkipFuncEvent *skipCacheProbeEvent; LinuxSkipIdeDelay50msEvent *skipIdeDelay50msEvent; LinuxSkipDelayLoopEvent *skipDelayLoopEvent; LinuxPrintfEvent *printfEvent; -- 2.30.2