From 3c954213eb65db35937c2415761827f10f457828 Mon Sep 17 00:00:00 2001 From: Vladimir Makarov Date: Fri, 30 Jan 2015 17:47:44 +0000 Subject: [PATCH] re PR target/64617 (ICE: Max. number of generated reload insns per insn is achieved (90) with -ftree-vectorize -mavx512bw -march=slm) 2015-01-30 Vladimir Makarov PR target/64617 * lra-constraints.c (prohibited_class_reg_set_mode_p): New function. (process_alt_operands): Use it. (curr_insn_transform): Check the optional reload pseudo class is ok for the mode. 2015-01-30 Vladimir Makarov PR target/64617 * gcc.target/i386/pr64617.c: New test. From-SVN: r220294 --- gcc/ChangeLog | 9 +++++ gcc/lra-constraints.c | 51 ++++++++++++++++--------- gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/gcc.target/i386/pr64617.c | 37 ++++++++++++++++++ 4 files changed, 83 insertions(+), 19 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr64617.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f7f058d55c3..59ca8d5f49b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2015-01-30 Vladimir Makarov + + PR target/64617 + * lra-constraints.c (prohibited_class_reg_set_mode_p): New + function. + (process_alt_operands): Use it. + (curr_insn_transform): Check the optional reload pseudo class is + ok for the mode. + 2015-01-30 Joseph Myers * diagnostic.c (fatal_error (const char *, ...)): Remove function. diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c index 6e4be72fedd..762889ce13c 100644 --- a/gcc/lra-constraints.c +++ b/gcc/lra-constraints.c @@ -1637,6 +1637,22 @@ reg_in_class_p (rtx reg, enum reg_class cl) return in_class_p (reg, cl, NULL); } +/* Return true if SET of RCLASS contains no hard regs which can be + used in MODE. */ +static bool +prohibited_class_reg_set_mode_p (enum reg_class rclass, + HARD_REG_SET &set, + enum machine_mode mode) +{ + HARD_REG_SET temp; + + lra_assert (hard_reg_set_subset_p (set, reg_class_contents[rclass])); + COPY_HARD_REG_SET (temp, set); + AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs); + return (hard_reg_set_subset_p + (temp, ira_prohibited_class_mode_regs[rclass][mode])); +} + /* Major function to choose the current insn alternative and what operands should be reloaded and how. If ONLY_ALTERNATIVE is not negative we should consider only this alternative. Return false if @@ -2311,28 +2327,20 @@ process_alt_operands (int only_alternative) not hold the mode value. */ && ! HARD_REGNO_MODE_OK (ira_class_hard_regs [this_alternative][0], - GET_MODE (*curr_id->operand_loc[nop]))) - { - HARD_REG_SET temp; - - COPY_HARD_REG_SET (temp, this_alternative_set); - AND_COMPL_HARD_REG_SET (temp, lra_no_alloc_regs); + GET_MODE (*curr_id->operand_loc[nop])) /* The above condition is not enough as the first reg in ira_class_hard_regs can be not aligned for multi-words mode values. */ - if (hard_reg_set_subset_p (temp, - ira_prohibited_class_mode_regs - [this_alternative] - [GET_MODE (*curr_id->operand_loc[nop])])) - { - if (lra_dump_file != NULL) - fprintf - (lra_dump_file, - " alt=%d: reload pseudo for op %d " - " can not hold the mode value -- refuse\n", - nalt, nop); - goto fail; - } + && (prohibited_class_reg_set_mode_p + (this_alternative, this_alternative_set, + GET_MODE (*curr_id->operand_loc[nop])))) + { + if (lra_dump_file != NULL) + fprintf (lra_dump_file, + " alt=%d: reload pseudo for op %d " + " can not hold the mode value -- refuse\n", + nalt, nop); + goto fail; } /* Check strong discouragement of reload of non-constant @@ -3732,6 +3740,11 @@ curr_insn_transform (bool check_only_p) && regno < new_regno_start && ! lra_former_scratch_p (regno) && reg_renumber[regno] < 0 + /* Check that the optional reload pseudo will be able to + hold given mode value. */ + && ! (prohibited_class_reg_set_mode_p + (goal_alt[i], reg_class_contents[goal_alt[i]], + PSEUDO_REGNO_MODE (regno))) && (curr_insn_set == NULL_RTX || !((REG_P (SET_SRC (curr_insn_set)) || MEM_P (SET_SRC (curr_insn_set)) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e90c8b0a636..715ee2cac7d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-01-30 Vladimir Makarov + + PR target/64617 + * gcc.target/i386/pr64617.c: New test. + 2015-01-30 Uros Bizjak PR target/15184 diff --git a/gcc/testsuite/gcc.target/i386/pr64617.c b/gcc/testsuite/gcc.target/i386/pr64617.c new file mode 100644 index 00000000000..6877d6ac01c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr64617.c @@ -0,0 +1,37 @@ +/* { dg-do compile } */ +/* { dg-options "-O -ftree-vectorize -mavx512bw -march=slm" } */ + +unsigned short out2[128 * 8], b0, b1, b2, b3, b4, b5, b6, b7, b8; + +void +foo (unsigned short a0, unsigned short a1, unsigned short a2, + unsigned short a3, unsigned short a4, unsigned short a5, + unsigned short a6, unsigned short a7, unsigned short a8) +{ + int i; + for (i = 0; i < 128; i++) + { + out2[i * 4] = a0 + 8; + } + for (i = 0; i < 128; i++) + { + b0 = a0 + 8; + b1 = a1 + 7; + b2 = a2 + 6; + b3 = a3 + 5; + b4 = a4 + 4; + b5 = a5 + 3; + b6 = a6 + 2; + b7 = a7 + 1; + b8 = a8 + 9; + + out2[i * 8] = b0; + out2[i * 8 + 1] = b1; + out2[i * 8 + 2] = b4; + out2[i * 8 + 3] = b5; + out2[i * 8 + 4] = b6; + out2[i * 8 + 5] = b2; + out2[i * 8 + 6] = b7; + out2[i * 8 + 7] = b8; + } +} -- 2.30.2