From 3c966fd688c1b8eb846fd8675275c33a08786b07 Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Wed, 25 Sep 2019 11:48:04 +0100 Subject: [PATCH] aco,radv: rename record_llvm_ir/llvm_ir_string to record_ir/ir_string MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann Reviewed-by: Bas Nieuwenhuizen --- src/amd/compiler/aco_interface.cpp | 6 +++--- src/amd/vulkan/radv_debug.c | 2 +- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- src/amd/vulkan/radv_pipeline.c | 4 ++-- src/amd/vulkan/radv_shader.c | 14 +++++++------- src/amd/vulkan/radv_shader.h | 8 ++++---- 6 files changed, 18 insertions(+), 18 deletions(-) diff --git a/src/amd/compiler/aco_interface.cpp b/src/amd/compiler/aco_interface.cpp index 2a1986357ca..79dd33385dc 100644 --- a/src/amd/compiler/aco_interface.cpp +++ b/src/amd/compiler/aco_interface.cpp @@ -96,7 +96,7 @@ void aco_compile_shader(unsigned shader_count, aco::schedule_program(program.get(), live_vars); std::string llvm_ir; - if (options->record_llvm_ir) { + if (options->record_ir) { char *data = NULL; size_t size = 0; FILE *f = open_memstream(&data, &size); @@ -140,7 +140,7 @@ void aco_compile_shader(unsigned shader_count, std::vector code; unsigned exec_size = aco::emit_program(program.get(), code); - bool get_disasm = options->dump_shader || options->record_llvm_ir; + bool get_disasm = options->dump_shader || options->record_ir; size_t size = llvm_ir.size(); @@ -167,7 +167,7 @@ void aco_compile_shader(unsigned shader_count, legacy_binary->config = config; legacy_binary->disasm_size = 0; - legacy_binary->llvm_ir_size = llvm_ir.size(); + legacy_binary->ir_size = llvm_ir.size(); llvm_ir.copy((char*) legacy_binary->data + legacy_binary->code_size, llvm_ir.size()); diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 41d329182ae..3d726555160 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -507,7 +507,7 @@ radv_dump_shader(struct radv_pipeline *pipeline, fprintf(f, "NIR:\n%s\n", shader->nir_string); } - fprintf(f, "LLVM IR:\n%s\n", shader->llvm_ir_string); + fprintf(f, "LLVM IR:\n%s\n", shader->ir_string); fprintf(f, "DISASM:\n%s\n", shader->disasm_string); radv_shader_dump_stats(pipeline->device, shader, stage, f); diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 9d394fd6b0c..313a5a6bc1d 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -4986,7 +4986,7 @@ static void ac_compile_llvm_module(struct ac_llvm_compiler *ac_llvm, fprintf(stderr, "\n"); } - if (options->record_llvm_ir) { + if (options->record_ir) { char *llvm_ir = LLVMPrintModuleToString(llvm_module); llvm_ir_string = strdup(llvm_ir); LLVMDisposeMessage(llvm_ir); diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 21d37313cb2..c107d551138 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -5241,7 +5241,7 @@ VkResult radv_GetPipelineExecutableInternalRepresentationsKHR( } ++p; - /* LLVM IR */ + /* backend IR */ if (p < end) { p->isText = true; if (shader->aco_used) { @@ -5251,7 +5251,7 @@ VkResult radv_GetPipelineExecutableInternalRepresentationsKHR( desc_copy(p->name, "LLVM IR"); desc_copy(p->description, "The LLVM IR after some optimizations"); } - if (radv_copy_representation(p->pData, &p->dataSize, shader->llvm_ir_string) != VK_SUCCESS) + if (radv_copy_representation(p->pData, &p->dataSize, shader->ir_string) != VK_SUCCESS) result = VK_INCOMPLETE; } ++p; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 10cce9c2768..2f3d85d7bf4 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -1032,7 +1032,7 @@ radv_shader_variant_create(struct radv_device *device, return NULL; } - variant->llvm_ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->elf_size)) : NULL; + variant->ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->elf_size)) : NULL; variant->disasm_string = malloc(disasm_size + 1); memcpy(variant->disasm_string, disasm_data, disasm_size); variant->disasm_string[disasm_size] = 0; @@ -1048,8 +1048,8 @@ radv_shader_variant_create(struct radv_device *device, for (unsigned i = 0; i < DEBUGGER_NUM_MARKERS; i++) ptr32[i] = DEBUGGER_END_OF_CODE_MARKER; - variant->llvm_ir_string = bin->llvm_ir_size ? strdup((const char*)(bin->data + bin->code_size)) : NULL; - variant->disasm_string = bin->disasm_size ? strdup((const char*)(bin->data + bin->code_size + bin->llvm_ir_size)) : NULL; + variant->ir_string = bin->ir_size ? strdup((const char*)(bin->data + bin->code_size)) : NULL; + variant->disasm_string = bin->disasm_size ? strdup((const char*)(bin->data + bin->code_size + bin->ir_size)) : NULL; } return variant; } @@ -1098,7 +1098,7 @@ shader_variant_compile(struct radv_device *device, options->dump_shader = radv_can_dump_shader(device, module, gs_copy_shader); options->dump_preoptir = options->dump_shader && device->instance->debug_flags & RADV_DEBUG_PREOPTIR; - options->record_llvm_ir = keep_shader_info; + options->record_ir = keep_shader_info; options->check_ir = device->instance->debug_flags & RADV_DEBUG_CHECKIR; options->tess_offchip_block_dw_size = device->tess_offchip_block_dw_size; options->address32_hi = device->physical_device->rad_info.address32_hi; @@ -1115,7 +1115,7 @@ shader_variant_compile(struct radv_device *device, else options->wave_size = device->physical_device->ge_wave_size; - if (!use_aco || options->dump_shader || options->record_llvm_ir) + if (!use_aco || options->dump_shader || options->record_ir) ac_init_llvm_once(); if (use_aco) { @@ -1238,7 +1238,7 @@ radv_shader_variant_destroy(struct radv_device *device, free(variant->nir_string); free(variant->disasm_string); - free(variant->llvm_ir_string); + free(variant->ir_string); free(variant); } @@ -1459,7 +1459,7 @@ radv_GetShaderInfoAMD(VkDevice _device, buf = _mesa_string_buffer_create(NULL, 1024); _mesa_string_buffer_printf(buf, "%s:\n", radv_get_shader_name(&variant->info, stage)); - _mesa_string_buffer_printf(buf, "%s\n\n", variant->llvm_ir_string); + _mesa_string_buffer_printf(buf, "%s\n\n", variant->ir_string); _mesa_string_buffer_printf(buf, "%s\n\n", variant->disasm_string); generate_shader_stats(device, variant, stage, buf); diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 37ff74b6f0b..349c1c968ee 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -123,7 +123,7 @@ struct radv_nir_compiler_options { bool robust_buffer_access; bool dump_shader; bool dump_preoptir; - bool record_llvm_ir; + bool record_ir; bool check_ir; bool has_ls_vgpr_init_bug; bool use_ngg_streamout; @@ -334,10 +334,10 @@ struct radv_shader_binary_legacy { struct ac_shader_config config; unsigned code_size; unsigned exec_size; - unsigned llvm_ir_size; + unsigned ir_size; unsigned disasm_size; - /* data has size of code_size + llvm_ir_size + disasm_size + 2, where + /* data has size of code_size + ir_size + disasm_size + 2, where * the +2 is for 0 of the ir strings. */ uint8_t data[0]; }; @@ -365,7 +365,7 @@ struct radv_shader_variant { uint32_t spirv_size; char *nir_string; char *disasm_string; - char *llvm_ir_string; + char *ir_string; struct list_head slab_list; }; -- 2.30.2