From 3c9e580511e713068c0ea0d7b34f6e50ebf85447 Mon Sep 17 00:00:00 2001 From: Matthew Malcomson Date: Tue, 21 Jan 2020 15:44:03 +0000 Subject: [PATCH] [AArch64] effective_target for aarch64 f64mm asm Commit 9ceec73 introduced intrinsics for the AArch64 FP64 matrix multiply instructions. These require binutils support for the same instructions. This patch adds a DejaGNU test to ensure this binutils support is there and uses it in the files that need this test. Testing Done: Checked on a cross-compiler that: Tests running for binutils commit e264b5b7a are listed as UNSUPPORTED. Tests running for binutils commit 26916852e all pass. gcc/testsuite/ChangeLog: 2020-01-21 Matthew Malcomson * gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Use require directive. * gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise. * gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise. * lib/target-supports.exp: Add assembly requirement directive. --- gcc/testsuite/ChangeLog | 16 ++++++++++++++++ .../gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c | 1 + gcc/testsuite/lib/target-supports.exp | 3 ++- 13 files changed, 29 insertions(+), 1 deletion(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 806e0b90441..eee1e0e9796 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,19 @@ +2020-01-21 Matthew Malcomson + + * gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: Use require + directive. + * gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: Likewise. + * gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: Likewise. + * lib/target-supports.exp: Add assembly requirement directive. + 2020-01-21 Tobias Burnus PR fortran/93309 diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c index 7badc75a43a..6eb94f1ca5f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c index dd8a1c53cd0..0a77c37ddd5 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c index 30563698310..65c6d9b02b8 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c index d4702fa6cc1..e3dc9bd51cf 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c index 4604b0b5fbf..f3af8e5cc25 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c index dac98b293fb..c1362236913 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c index 17df5dbb0d7..e9881c386f1 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c index 611e9166b0f..2529d90599f 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c index 7cb5bb93aa0..2a1e261f330 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c index 2194d52d5e3..aa5bd5725af 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c index b98c0c7444f..6d181de6b46 100644 --- a/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c +++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c @@ -1,5 +1,6 @@ /* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ /* { dg-additional-options "-march=armv8.6-a+sve+f64mm" } */ +/* { dg-require-effective-target aarch64_asm_f64mm_ok } */ #include "test_sve_acle.h" diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index cdee31e2413..f65a8100da9 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -8987,7 +8987,8 @@ proc check_effective_target_aarch64_tiny { } { # Create functions to check that the AArch64 assembler supports the # various architecture extensions via the .arch_extension pseudo-op. -foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve"} { +foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve" + "f64mm" } { eval [string map [list FUNC $aarch64_ext] { proc check_effective_target_aarch64_asm_FUNC_ok { } { if { [istarget aarch64*-*-*] } { -- 2.30.2