From 3cc07e5a3d9c823374f7afcc1a55c79f542cdd5b Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 29 Apr 2023 15:30:51 +0100 Subject: [PATCH] --- openpower/sv/twin_butterfly.mdwn | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/openpower/sv/twin_butterfly.mdwn b/openpower/sv/twin_butterfly.mdwn index 8d11350bd..d47bf18cf 100644 --- a/openpower/sv/twin_butterfly.mdwn +++ b/openpower/sv/twin_butterfly.mdwn @@ -116,8 +116,7 @@ Pseudo-code: ``` FRS <- FPADD32(FRT, FRB) - sub <- FPSUB32(FRT, FRB) - FRT <- FPMUL32(FRA, sub) + FRT <- FPMULADD32(FRT, FRA, FRB, 1, -1) ``` The Floating-Point operand in register FRT is added to the floating-point @@ -129,9 +128,9 @@ is subtracted from the floating-point operand in register FRT and the result then multiplied by FRA to create an intermediate result that is stored in FRT. -The subtraction and multiply are treated as if they were `fsub` -followed by `fmul`, not `fmsub`. The creation of FRS and FRT are -treated as parallel independent operations. +The add into FRS is treated exactly as `fadd`. The creation +of the result FRT is exact!y that of `fmsub`. The creation of FRS and FRT are +treated as parallel independent operations which occur at the same time. Note that if Rc=1 an Illegal Instruction is raised. Rc=1 is `RESERVED` -- 2.30.2