From 3d3267a0c2663c7ba2b6344cc3b675f7a490a2f9 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 8 Sep 2022 19:30:03 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index 1e501915c..a672765bb 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -32,7 +32,8 @@ the **Scalar** Power ISA before Simple-V may orthogonally Vectorise them. Therefore because the goal of RED Semiconductor Ltd, an OpenPOWER Stakeholder, is to bring to market mass-volume general-purpose compute processors that are competitive in the 3D GPU Audio Visual DSP EDGE IoT -desktop chromebook netbook smartphone laptop markets, Simple-V has to +desktop chromebook netbook smartphone laptop markets, performance-leveraged +by Simple-V. Simple-V thus has to be accompanied by corresponding **Scalar** instructions that bring the **Scalar** Power ISA up-to-date. These include IEEE754 Transcendentals AV cryptographic Biginteger and bitmanipulation operations that ARM -- 2.30.2