From 3d53551b8809a2a673530aad9c7b5ccf2c26bbd3 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Tue, 7 Jan 2020 01:34:19 +0000 Subject: [PATCH] Fix bad code of vector extract of PC-relative address with variable element #. 2020-01-06 Michael Meissner * config/rs6000/vsx.md (vsx_extract__var, VSX_D iterator): Use 'Q' for doing vector extract from memory. (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from memory. (vsx_extract__var, VSX_EXTRACT_I iterator): Use 'Q' for doing vector extract from memory. (vsx_extract__mode_var): Use 'Q' for doing vector extract from memory. From-SVN: r279938 --- gcc/ChangeLog | 9 +++++++++ gcc/config/rs6000/vsx.md | 8 ++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b2e6d8504b5..0f258ffd4e1 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,14 @@ 2020-01-06 Michael Meissner + * config/rs6000/vsx.md (vsx_extract__var, VSX_D iterator): + Use 'Q' for doing vector extract from memory. + (vsx_extract_v4sf_var): Use 'Q' for doing vector extract from + memory. + (vsx_extract__var, VSX_EXTRACT_I iterator): Use 'Q' for + doing vector extract from memory. + (vsx_extract__mode_var): Use 'Q' for doing vector + extract from memory. + * config/rs6000/rs6000.c (rs6000_adjust_vec_address): Add support for the offset being 34-bits when -mcpu=future is used. diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 909f29b9397..189c7d842ac 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -3248,7 +3248,7 @@ ;; Variable V2DI/V2DF extract (define_insn_and_split "vsx_extract__var" [(set (match_operand: 0 "gpc_reg_operand" "=v,wa,r") - (unspec: [(match_operand:VSX_D 1 "input_operand" "v,m,m") + (unspec: [(match_operand:VSX_D 1 "input_operand" "v,Q,Q") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,&b,&b")) @@ -3318,7 +3318,7 @@ ;; Variable V4SF extract (define_insn_and_split "vsx_extract_v4sf_var" [(set (match_operand:SF 0 "gpc_reg_operand" "=wa,wa,?r") - (unspec:SF [(match_operand:V4SF 1 "input_operand" "v,m,m") + (unspec:SF [(match_operand:V4SF 1 "input_operand" "v,Q,Q") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,&b,&b")) @@ -3681,7 +3681,7 @@ (define_insn_and_split "vsx_extract__var" [(set (match_operand: 0 "gpc_reg_operand" "=r,r,r") (unspec: - [(match_operand:VSX_EXTRACT_I 1 "input_operand" "v,v,m") + [(match_operand:VSX_EXTRACT_I 1 "input_operand" "v,v,Q") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) (clobber (match_scratch:DI 3 "=r,r,&b")) @@ -3701,7 +3701,7 @@ [(set (match_operand: 0 "gpc_reg_operand" "=r,r,r") (zero_extend: (unspec: - [(match_operand:VSX_EXTRACT_I 1 "input_operand" "v,v,m") + [(match_operand:VSX_EXTRACT_I 1 "input_operand" "v,v,Q") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT))) (clobber (match_scratch:DI 3 "=r,r,&b")) -- 2.30.2