From 3d7a1491aac0849a2a9fae2a06242e125de883d0 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 18 Jan 2014 19:27:16 +0100 Subject: [PATCH] Fixed $lut simlib model for a wider range of tools --- techlibs/common/simlib.v | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v index e522e37c6..0e041e12e 100644 --- a/techlibs/common/simlib.v +++ b/techlibs/common/simlib.v @@ -715,17 +715,19 @@ generate \$lut #( .WIDTH(WIDTH-1), .LUT(LUT ) ) lut0 ( .I(I[WIDTH-2:0]), .O(lut0_out) ); \$lut #( .WIDTH(WIDTH-1), .LUT(LUT >> (2**(WIDTH-1))) ) lut1 ( .I(I[WIDTH-2:0]), .O(lut1_out) ); end -endgenerate -always @* begin - casez ({I[WIDTH-1], lut0_out, lut1_out}) - 3'b?11: O = 1'b1; - 3'b?00: O = 1'b0; - 3'b0??: O = lut0_out; - 3'b1??: O = lut1_out; - default: O = 1'bx; - endcase -end + if (WIDTH > 0) begin:lutlogic + always @* begin + casez ({I[WIDTH-1], lut0_out, lut1_out}) + 3'b?11: O = 1'b1; + 3'b?00: O = 1'b0; + 3'b0??: O = lut0_out; + 3'b1??: O = lut1_out; + default: O = 1'bx; + endcase + end + end +endgenerate endmodule -- 2.30.2