From 3e1287caefed01a5f6218e2911ec8409c63ad397 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 5 Dec 2017 13:32:47 +0100 Subject: [PATCH] radeonsi/gfx9: make shader binaries use read-only memory MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Tested-by: Dieter Nützel Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_buffer_common.c | 3 +++ src/gallium/drivers/radeon/r600_pipe_common.h | 1 + src/gallium/drivers/radeonsi/si_pipe.c | 2 ++ src/gallium/drivers/radeonsi/si_pipe.h | 1 + src/gallium/drivers/radeonsi/si_shader.c | 9 ++++++--- 5 files changed, 13 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index 09075f3ea29..aca536d7fd4 100644 --- a/src/gallium/drivers/radeon/r600_buffer_common.c +++ b/src/gallium/drivers/radeon/r600_buffer_common.c @@ -174,6 +174,9 @@ void si_init_resource_fields(struct si_screen *sscreen, if (sscreen->debug_flags & DBG(NO_WC)) res->flags &= ~RADEON_FLAG_GTT_WC; + if (res->b.b.flags & R600_RESOURCE_FLAG_READ_ONLY) + res->flags |= RADEON_FLAG_READ_ONLY; + /* Set expected VRAM and GART usage for the buffer. */ res->vram_usage = 0; res->gart_usage = 0; diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 498a7418c0a..d1fdea074e9 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -53,6 +53,7 @@ struct si_context; #define R600_RESOURCE_FLAG_FORCE_TILING (PIPE_RESOURCE_FLAG_DRV_PRIV << 2) #define R600_RESOURCE_FLAG_DISABLE_DCC (PIPE_RESOURCE_FLAG_DRV_PRIV << 3) #define R600_RESOURCE_FLAG_UNMAPPABLE (PIPE_RESOURCE_FLAG_DRV_PRIV << 4) +#define R600_RESOURCE_FLAG_READ_ONLY (PIPE_RESOURCE_FLAG_DRV_PRIV << 5) /* Debug flags. */ enum { diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 5d7837dd116..676d199618b 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -829,6 +829,8 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws, (sscreen->debug_flags & DBG(DCC_MSAA) || sscreen->info.chip_class == VI); + sscreen->cpdma_prefetch_writes_memory = sscreen->info.chip_class <= VI; + (void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain); sscreen->use_monolithic_shaders = (sscreen->debug_flags & DBG(MONOLITHIC_SHADERS)) != 0; diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 7a099376021..3a959f98da5 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -123,6 +123,7 @@ struct si_screen { bool has_rbplus; /* if RB+ registers exist */ bool rbplus_allowed; /* if RB+ is allowed */ bool dcc_msaa_allowed; + bool cpdma_prefetch_writes_memory; struct slab_parent_pool pool_transfers; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 6a1293b99d1..5da9ec0bf54 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -5057,9 +5057,12 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader) r600_resource_reference(&shader->bo, NULL); shader->bo = (struct r600_resource*) - pipe_buffer_create(&sscreen->b, 0, - PIPE_USAGE_IMMUTABLE, - align(bo_size, SI_CPDMA_ALIGNMENT)); + si_aligned_buffer_create(&sscreen->b, + sscreen->cpdma_prefetch_writes_memory ? + 0 : R600_RESOURCE_FLAG_READ_ONLY, + PIPE_USAGE_IMMUTABLE, + align(bo_size, SI_CPDMA_ALIGNMENT), + 256); if (!shader->bo) return -ENOMEM; -- 2.30.2