From 3e1e346c60b885d6bba8cd3292bd26239ad99423 Mon Sep 17 00:00:00 2001
From: Michael Nolan <mtnolan2640@gmail.com>
Date: Wed, 6 May 2020 10:32:24 -0400
Subject: [PATCH] Sorta kinda working bl and blr - need to properly implement
 lr

---
 src/soc/decoder/isa/caller.py      |  2 ++
 src/soc/decoder/isa/test_caller.py | 10 ++++++++++
 src/soc/decoder/selectable_int.py  |  4 ++++
 3 files changed, 16 insertions(+)

diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py
index 03503330..48377dc0 100644
--- a/src/soc/decoder/isa/caller.py
+++ b/src/soc/decoder/isa/caller.py
@@ -161,7 +161,9 @@ class ISACaller:
                           'CIA': self.pc.CIA,
                           'CR': self.cr,
                           'LR': self.undefined,
+                          'CTR': self.undefined,
                           'undefined': self.undefined,
+                          'mode_is_64bit': True,
                           }
 
         # field-selectable versions of Condition Register TODO check bitranges?
diff --git a/src/soc/decoder/isa/test_caller.py b/src/soc/decoder/isa/test_caller.py
index 5d4869fa..c693f86e 100644
--- a/src/soc/decoder/isa/test_caller.py
+++ b/src/soc/decoder/isa/test_caller.py
@@ -106,6 +106,16 @@ class DecoderTestCase(FHDLTestCase):
             self.assertEqual(sim.gpr(1), SelectableInt(0x0, 64))
             self.assertEqual(sim.gpr(2), SelectableInt(0x1234, 64))
 
+    def test_branch_link(self):
+        lst = ["bl 0xc",
+               "addi 2, 1, 0x1234",
+               "ba 0x1000",
+               "addi 1, 0, 0x1234",
+               "bclr 20, 0, 0"]
+        with Program(lst) as program:
+            sim = self.run_tst_program(program)
+
+
     @unittest.skip("broken")  # FIXME
     def test_mtcrf(self):
         for i in range(4):
diff --git a/src/soc/decoder/selectable_int.py b/src/soc/decoder/selectable_int.py
index c4698c01..239162f3 100644
--- a/src/soc/decoder/selectable_int.py
+++ b/src/soc/decoder/selectable_int.py
@@ -44,10 +44,14 @@ class FieldSelectableInt:
 
     def __getitem__(self, key):
         print ("getitem", key, self.br)
+        if isinstance(key, SelectableInt):
+            key = key.value
         key = self.br[key] # don't do POWER 1.3.4 bit-inversion
         return self.si[key]
 
     def __setitem__(self, key, value):
+        if isinstance(key, SelectableInt):
+            key = key.value
         key = self.br[key] # don't do POWER 1.3.4 bit-inversion
         return self.si.__setitem__(key, value)
 
-- 
2.30.2