From 3e72dbd3f93141d60642ef8a1a87fcf629599f0b Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 5 Nov 2018 08:01:46 +0000 Subject: [PATCH] add state and bank sv csr bitfields --- riscv/processor.cc | 17 ++++++++++++----- riscv/processor.h | 2 ++ riscv/sv.h | 7 +++++++ 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/riscv/processor.cc b/riscv/processor.cc index 66a11fd..622b829 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -413,12 +413,18 @@ void processor_t::set_csr(int which, reg_t val) fprintf(stderr, "set MVL %lx\n", state.sv().mvl); break; case CSR_USVSTATE: + { // bits 0-5: mvl - 6-11: vl - 12-17: srcoffs - 18-23: destoffs - set_csr(CSR_USVMVL, get_field(val, 0x1f )+1); - set_csr(CSR_USVVL , get_field(val, 0x1f<<6)+1); - state.sv().srcoffs = std::min(get_field(val, 0x1f<<12), state.sv().vl-1); - state.sv().destoffs = std::min(get_field(val, 0x1f<<18), state.sv().vl-1); + set_csr(CSR_USVMVL, get_field(val, SV_STATE_VL )+1); + set_csr(CSR_USVVL , get_field(val, SV_STATE_MVL)+1); + reg_t srcoffs = get_field(val, SV_STATE_SRCOFFS); + reg_t destoffs = get_field(val, SV_STATE_DESTOFFS); + state.sv().srcoffs = std::min(srcoffs , state.sv().vl-1); + state.sv().destoffs = std::min(destoffs, state.sv().vl-1); + state.sv().state_bank = get_field(val, SV_STATE_BANK); + state.sv().state_size = get_field(val, SV_STATE_SIZE); break; + } case CSR_USVVL: state.sv().vl = std::min(state.sv().mvl, val); // TODO XXX throw exception if val == 0 @@ -805,7 +811,8 @@ reg_t processor_t::get_csr(int which) return state.sv().vl; case CSR_USVSTATE: return (state.sv().vl-1) | ((state.sv().mvl-1)<<6) | - (state.sv().srcoffs<<12) | (state.sv().destoffs<<18) ; + (state.sv().srcoffs<<12) | (state.sv().destoffs<<18) | + (state.sv().state_bank<<24) | (state.sv().state_size<<26); case CSR_USVMVL: return state.sv().mvl; case CSR_SVREGCFG0: diff --git a/riscv/processor.h b/riscv/processor.h index 4e8cd3b..ee37e2c 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -95,6 +95,8 @@ typedef struct uint64_t mvl; int destoffs; // destination loop element offset int srcoffs; // source loop element offset (used in twin-predication) + int state_size; + int state_bank; sv_reg_csr_entry sv_csrs[SV_UCSR_SZ]; sv_reg_entry sv_int_tb[NXPR]; sv_reg_entry sv_fp_tb[NFPR]; diff --git a/riscv/sv.h b/riscv/sv.h index fc06de1..b82eeec 100644 --- a/riscv/sv.h +++ b/riscv/sv.h @@ -104,4 +104,11 @@ typedef struct { #define SV_SHAPE_PERM_ZXY 4 #define SV_SHAPE_PERM_ZYX 5 +#define SV_STATE_VL (0x1f) +#define SV_STATE_MVL (0x1f<<6) +#define SV_STATE_SRCOFFS (0x1f<<12) +#define SV_STATE_DESTOFFS (0x1f<<18) +#define SV_STATE_BANK (0x1f<<24) +#define SV_STATE_SIZE (0x1f<<26) + #endif -- 2.30.2