From 3ea576348add7dc16318ad2bb8c7632af6cd2281 Mon Sep 17 00:00:00 2001 From: Shriya Sharma Date: Tue, 26 Sep 2023 11:29:47 +0100 Subject: [PATCH] Added brackets for lhaux instruction --- openpower/isa/fixedload.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/isa/fixedload.mdwn b/openpower/isa/fixedload.mdwn index 16575ce5..1199024d 100644 --- a/openpower/isa/fixedload.mdwn +++ b/openpower/isa/fixedload.mdwn @@ -307,7 +307,7 @@ Description: Let the effective address (EA) be the sum (RA)+ (RB). The halfword in storage addressed by EA is loaded into - RT48:63. RT 0:47 are filled with a copy of bit 0 of the + RT[48:63]. RT[0:47] are filled with a copy of bit 0 of the loaded halfword. EA is placed into register RA. -- 2.30.2