From 3eb9efd64f33c02fb1492965f881fa5f725d0497 Mon Sep 17 00:00:00 2001 From: sadullah Date: Thu, 30 Apr 2020 23:02:32 -0400 Subject: [PATCH] BP fpga recent version --- ...xampleBlackParrotSystem_Linux_Simulation.v | 356 +++++++++++++++++ .../bp_fpga/ExampleBlackParrotSystem_UART.v | 357 ++++++++++++++++++ .../bp_fpga/fpga/ExampleBlackParrotSystem.v | 357 ++++++++++++++++++ .../simulation/ExampleBlackParrotSystem.v | 357 ++++++++++++++++++ litex/soc/cores/cpu/blackparrot/flist.fpga | 250 ++++++++++++ .../soc/cores/cpu/blackparrot/flist.verilator | 250 ++++++++++++ 6 files changed, 1927 insertions(+) create mode 100644 litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_Linux_Simulation.v create mode 100644 litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_UART.v create mode 100644 litex/soc/cores/cpu/blackparrot/bp_fpga/fpga/ExampleBlackParrotSystem.v create mode 100644 litex/soc/cores/cpu/blackparrot/bp_fpga/simulation/ExampleBlackParrotSystem.v create mode 100644 litex/soc/cores/cpu/blackparrot/flist.fpga create mode 100644 litex/soc/cores/cpu/blackparrot/flist.verilator diff --git a/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_Linux_Simulation.v b/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_Linux_Simulation.v new file mode 100644 index 00000000..3c053f21 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_Linux_Simulation.v @@ -0,0 +1,356 @@ +/** + * + * ExampleBlackParrotSystem.v + * + */ + +`include "bsg_noc_links.vh" + +module ExampleBlackParrotSystem + import bp_common_pkg::*; + import bp_common_aviary_pkg::*; + import bp_be_pkg::*; + import bp_common_rv64_pkg::*; + import bp_cce_pkg::*; + import bp_me_pkg::*; + import bp_common_cfg_link_pkg::*; + import bsg_noc_pkg::*; + #(parameter bp_params_e bp_params_p = e_bp_softcore_cfg + `declare_bp_proc_params(bp_params_p) + `declare_bp_me_if_widths(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + + // Tracing parameters + , parameter calc_trace_p = 0 + , parameter cce_trace_p = 0 + , parameter cmt_trace_p = 0 + , parameter dram_trace_p = 0 + , parameter npc_trace_p = 0 + , parameter dcache_trace_p = 0 + , parameter vm_trace_p = 0 + , parameter preload_mem_p = 1 + , parameter load_nbf_p = 0 + , parameter skip_init_p = 0 + , parameter cosim_p = 0 + , parameter cosim_cfg_file_p = "prog.cfg" + + , parameter mem_zero_p = 1 + , parameter mem_file_p = "prog.mem" + , parameter mem_cap_in_bytes_p = 2**25 + , parameter [paddr_width_p-1:0] mem_offset_p = paddr_width_p'(32'h8000_0000) + + // Number of elements in the fake BlackParrot memory + , parameter use_max_latency_p = 1 + , parameter use_random_latency_p = 0 + , parameter use_dramsim2_latency_p = 0 + + , parameter max_latency_p = 15 + + , parameter dram_clock_period_in_ps_p = 1000 + , parameter dram_cfg_p = "dram_ch.ini" + , parameter dram_sys_cfg_p = "dram_sys.ini" + , parameter dram_capacity_p = 16384 + ) + (input clk_i + , input reset_i + //Wishbone interface + , input [63:0] wbm_dat_i + , output [63:0] wbm_dat_o + , input wbm_ack_i + , input wbm_err_i +// , input wbm_rty_i + , output [36:0] wbm_adr_o //TODO parametrize this + , output wbm_stb_o + , output wbm_cyc_o + , output [7:0] wbm_sel_o //TODO: how many bits ? check + , output wbm_we_o + , output [2:0] wbm_cti_o //TODO: + , output [1:0] wbm_bte_o + // , input [3:0] interrupts + ); + +`declare_bp_me_if(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + +bp_cce_mem_msg_s proc_mem_cmd_lo; +logic proc_mem_cmd_v_lo, proc_mem_cmd_ready_li; +bp_cce_mem_msg_s proc_mem_resp_li; +logic proc_mem_resp_v_li, proc_mem_resp_yumi_lo; + +bp_cce_mem_msg_s proc_io_cmd_lo; +logic proc_io_cmd_v_lo, proc_io_cmd_ready_li; +bp_cce_mem_msg_s proc_io_resp_li; +logic proc_io_resp_v_li, proc_io_resp_yumi_lo; + +bp_cce_mem_msg_s io_cmd_lo; +logic io_cmd_v_lo, io_cmd_ready_li; +bp_cce_mem_msg_s io_resp_li; +logic io_resp_v_li, io_resp_yumi_lo; +bp_softcore + #(.bp_params_p(bp_params_p)) + softcore + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_o(proc_io_cmd_lo) + ,.io_cmd_v_o(proc_io_cmd_v_lo) + ,.io_cmd_ready_i(proc_io_cmd_ready_li) + + ,.io_resp_i(proc_io_resp_li) + ,.io_resp_v_i(proc_io_resp_v_li) + ,.io_resp_yumi_o(proc_io_resp_yumi_lo) + + ,.mem_cmd_o(proc_mem_cmd_lo) + ,.mem_cmd_v_o(proc_mem_cmd_v_lo) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_o(proc_mem_resp_yumi_lo) + ); + + bp2wb_convertor + #(.bp_params_p(bp_params_p)) + bp2wb + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + + ,.dat_i(wbm_dat_i) + ,.dat_o(wbm_dat_o) + ,.ack_i(wbm_ack_i) + ,.adr_o(wbm_adr_o) + ,.stb_o(wbm_stb_o) + ,.cyc_o(wbm_cyc_o) + ,.sel_o(wbm_sel_o ) + ,.we_o(wbm_we_o) + ,.cti_o(wbm_cti_o) + ,.bte_o(wbm_bte_o ) + // ,.rty_i(wbm_rty_i) + ,.err_i(wbm_err_i) + ); + +/* +bp_mem + mem + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +logic program_finish_lo; +bp_nonsynth_host + #(.bp_params_p(bp_params_p)) + host + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_i(proc_io_cmd_lo) + ,.io_cmd_v_i(proc_io_cmd_v_lo & proc_io_cmd_ready_li) + ,.io_cmd_ready_o(proc_io_cmd_ready_li) + + ,.io_resp_o(proc_io_resp_li) + ,.io_resp_v_o(proc_io_resp_v_li) + ,.io_resp_yumi_i(proc_io_resp_yumi_lo) + + ,.program_finish_o(program_finish_lo) + ); + +/*bind bp_be_top + bp_nonsynth_commit_tracer + #(.bp_params_p(bp_params_p)) + commit_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.cmt_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i('0) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + ); +*/ +/* bind bp_be_top + bp_nonsynth_cosim + #(.bp_params_p(bp_params_p)) + cosim + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.en_i(ExampleBlackParrotSystem.cosim_p == 1) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + // Want to pass config file as a parameter, but cannot in Verilator 4.025 + // Parameter-resolved constants must not use dotted references + ,.config_file_i(ExampleBlackParrotSystem.cosim_cfg_file_p) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + + ,.interrupt_v_i(be_mem.csr.trap_pkt_cast_o._interrupt) + ,.cause_i(be_mem.csr.trap_pkt_cast_o.cause) + ); +*/ +/*bind bp_be_top + bp_be_nonsynth_perf + #(.bp_params_p(bp_params_p)) + perf + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.fe_nop_i(be_calculator.exc_stage_r[2].fe_nop_v) + ,.be_nop_i(be_calculator.exc_stage_r[2].be_nop_v) + ,.me_nop_i(be_calculator.exc_stage_r[2].me_nop_v) + ,.poison_i(be_calculator.exc_stage_r[2].poison_v) + ,.roll_i(be_calculator.exc_stage_r[2].roll_v) + + ,.instr_cmt_i(be_calculator.commit_pkt.instret) + + ,.program_finish_i(ExampleBlackParrotSystem.program_finish_lo) + ); +*/ + /* bind bp_be_director + bp_be_nonsynth_npc_tracer + #(.bp_params_p(bp_params_p)) + npc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.npc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.npc_w_v(npc_w_v) + ,.npc_n(npc_n) + ,.npc_r(npc_r) + ,.expected_npc_o(expected_npc_o) + + ,.fe_cmd_i(fe_cmd) + ,.fe_cmd_v(fe_cmd_v) + + ,.commit_pkt_i(commit_pkt) + ); +*/ + /*bind bp_be_dcache + bp_be_nonsynth_dcache_tracer + #(.bp_params_p(bp_params_p)) + dcache_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dcache_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(cfg_bus_cast_i.core_id) + + ,.v_tv_r(v_tv_r) + //,.cache_miss_i(cache_miss_i) + + ,.paddr_tv_r(paddr_tv_r) + ,.uncached_tv_r(uncached_tv_r) + ,.load_op_tv_r(load_op_tv_r) + ,.store_op_tv_r(store_op_tv_r) + ,.lr_op_tv_r(lr_op_tv_r) + ,.sc_op_tv_r(sc_op_tv_r) + ,.store_data(data_tv_r) + ,.load_data(data_o) + );*/ +/* + bind bp_be_top + bp_be_nonsynth_calc_tracer + #(.bp_params_p(bp_params_p)) + calc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.calc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.issue_pkt_i(be_checker.scheduler.issue_pkt) + ,.issue_pkt_v_i(be_checker.scheduler.fe_queue_yumi_o) + + ,.fe_nop_v_i(be_calculator.exc_stage_n[0].fe_nop_v) + ,.be_nop_v_i(be_calculator.exc_stage_n[0].be_nop_v) + ,.me_nop_v_i(be_calculator.exc_stage_n[0].me_nop_v) + ,.dispatch_pkt_i(be_calculator.dispatch_pkt) + + ,.ex1_br_tgt_i(be_calculator.calc_status.ex1_npc) + ,.ex1_btaken_i(be_calculator.pipe_int.btaken) + ,.iwb_result_i(be_calculator.comp_stage_n[3]) + ,.fwb_result_i(be_calculator.comp_stage_n[4]) + + ,.cmt_trace_exc_i(be_calculator.exc_stage_n[1+:5]) + + ,.trap_v_i(be_mem.csr.trap_pkt_cast_o._interrupt | be_mem.csr.trap_pkt_cast_o.exception) + ,.mtvec_i(be_mem.csr.mtvec_n) + ,.mtval_i(be_mem.csr.mtval_n[0+:vaddr_width_p]) + ,.ret_v_i(be_mem.csr.trap_pkt_cast_o.eret) + ,.mepc_i(be_mem.csr.mepc_n[0+:vaddr_width_p]) + ,.mcause_i(be_mem.csr.mcause_n) + + ,.priv_mode_i(be_mem.csr.priv_mode_n) + ,.mpp_i(be_mem.csr.mstatus_n.mpp) + ); + + bind bp_core_minimal + bp_be_nonsynth_vm_tracer + #(.bp_params_p(bp_params_p)) + vm_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.vm_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be.be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.itlb_clear_i(fe.mem.itlb.flush_i) + ,.itlb_fill_v_i(fe.mem.itlb.v_i & fe.mem.itlb.w_i) + ,.itlb_vtag_i(fe.mem.itlb.vtag_i) + ,.itlb_entry_i(fe.mem.itlb.entry_i) + + ,.dtlb_clear_i(be.be_mem.dtlb.flush_i) + ,.dtlb_fill_v_i(be.be_mem.dtlb.v_i & be.be_mem.dtlb.w_i) + ,.dtlb_vtag_i(be.be_mem.dtlb.vtag_i) + ,.dtlb_entry_i(be.be_mem.dtlb.entry_i) + ); +*/ + /*bp_mem_nonsynth_tracer + #(.bp_params_p(bp_params_p)) + bp_mem_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dram_trace_p == 1)) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +/*bp_nonsynth_if_verif + #(.bp_params_p(bp_params_p)) + if_verif + (); +*/ +endmodule + diff --git a/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_UART.v b/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_UART.v new file mode 100644 index 00000000..c226c331 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/bp_fpga/ExampleBlackParrotSystem_UART.v @@ -0,0 +1,357 @@ +/** + * + * ExampleBlackParrotSystem.v + * + */ + +`include "bsg_noc_links.vh" + +module ExampleBlackParrotSystem + import bp_common_pkg::*; + import bp_common_aviary_pkg::*; + import bp_be_pkg::*; + import bp_common_rv64_pkg::*; + import bp_cce_pkg::*; + import bp_me_pkg::*; + import bp_common_cfg_link_pkg::*; + import bsg_noc_pkg::*; + #(parameter bp_params_e bp_params_p = e_bp_softcore_cfg + `declare_bp_proc_params(bp_params_p) + `declare_bp_me_if_widths(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + + // Tracing parameters + , parameter calc_trace_p = 0 + , parameter cce_trace_p = 0 + , parameter cmt_trace_p = 1 + , parameter dram_trace_p = 1 + , parameter npc_trace_p = 0 + , parameter dcache_trace_p = 0 + , parameter vm_trace_p = 0 + , parameter preload_mem_p = 1 + , parameter load_nbf_p = 0 + , parameter skip_init_p = 0 + , parameter cosim_p = 0 + , parameter cosim_cfg_file_p = "prog.cfg" + + , parameter mem_zero_p = 1 + , parameter mem_file_p = "prog.mem" + , parameter mem_cap_in_bytes_p = 2**25 + , parameter [paddr_width_p-1:0] mem_offset_p = paddr_width_p'(32'h8000_0000) + + // Number of elements in the fake BlackParrot memory + , parameter use_max_latency_p = 1 + , parameter use_random_latency_p = 0 + , parameter use_dramsim2_latency_p = 0 + + , parameter max_latency_p = 15 + + , parameter dram_clock_period_in_ps_p = 1000 + , parameter dram_cfg_p = "dram_ch.ini" + , parameter dram_sys_cfg_p = "dram_sys.ini" + , parameter dram_capacity_p = 16384 + ) + (input clk_i + , input reset_i + //Wishbone interface + , input [63:0] wbm_dat_i + , output [63:0] wbm_dat_o + , input wbm_ack_i + , input wbm_err_i +// , input wbm_rty_i + , output [36:0] wbm_adr_o //TODO parametrize this + , output wbm_stb_o + , output wbm_cyc_o + , output [7:0] wbm_sel_o //TODO: how many bits ? check + , output wbm_we_o + , output [2:0] wbm_cti_o //TODO: + , output [1:0] wbm_bte_o + // , input [3:0] interrupts + ); + +`declare_bp_me_if(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + +bp_cce_mem_msg_s proc_mem_cmd_lo; +logic proc_mem_cmd_v_lo, proc_mem_cmd_ready_li; +bp_cce_mem_msg_s proc_mem_resp_li; +logic proc_mem_resp_v_li, proc_mem_resp_yumi_lo; + +bp_cce_mem_msg_s proc_io_cmd_lo; +logic proc_io_cmd_v_lo, proc_io_cmd_ready_li; +bp_cce_mem_msg_s proc_io_resp_li; +logic proc_io_resp_v_li, proc_io_resp_yumi_lo; + +bp_cce_mem_msg_s io_cmd_lo; +logic io_cmd_v_lo, io_cmd_ready_li; +bp_cce_mem_msg_s io_resp_li; +logic io_resp_v_li, io_resp_yumi_lo; +bp_softcore + #(.bp_params_p(bp_params_p)) + softcore + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_o(proc_io_cmd_lo) + ,.io_cmd_v_o(proc_io_cmd_v_lo) + ,.io_cmd_ready_i(proc_io_cmd_ready_li) + + ,.io_resp_i(proc_io_resp_li) + ,.io_resp_v_i(proc_io_resp_v_li) + ,.io_resp_yumi_o(proc_io_resp_yumi_lo) + + ,.mem_cmd_o(proc_mem_cmd_lo) + ,.mem_cmd_v_o(proc_mem_cmd_v_lo) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_o(proc_mem_resp_yumi_lo) + ); + + bp2wb_convertor + #(.bp_params_p(bp_params_p)) + bp2wb + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + + ,.dat_i(wbm_dat_i) + ,.dat_o(wbm_dat_o) + ,.ack_i(wbm_ack_i) + ,.adr_o(wbm_adr_o) + ,.stb_o(wbm_stb_o) + ,.cyc_o(wbm_cyc_o) + ,.sel_o(wbm_sel_o ) + ,.we_o(wbm_we_o) + ,.cti_o(wbm_cti_o) + ,.bte_o(wbm_bte_o ) + // ,.rty_i(wbm_rty_i) + ,.err_i(wbm_err_i) + ); + +/* +bp_mem + mem + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +logic program_finish_lo; +assign proc_io_cmd_ready_li = 1; +/*bp_nonsynth_host + #(.bp_params_p(bp_params_p)) + host + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_i(proc_io_cmd_lo) + ,.io_cmd_v_i(proc_io_cmd_v_lo & proc_io_cmd_ready_li) + ,.io_cmd_ready_o(proc_io_cmd_ready_li) + + ,.io_resp_o(proc_io_resp_li) + ,.io_resp_v_o(proc_io_resp_v_li) + ,.io_resp_yumi_i(proc_io_resp_yumi_lo) + + ,.program_finish_o(program_finish_lo) + ); +*/ +bind bp_be_top + bp_nonsynth_commit_tracer + #(.bp_params_p(bp_params_p)) + commit_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.cmt_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i('0) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + ); + +/* bind bp_be_top + bp_nonsynth_cosim + #(.bp_params_p(bp_params_p)) + cosim + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.en_i(ExampleBlackParrotSystem.cosim_p == 1) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + // Want to pass config file as a parameter, but cannot in Verilator 4.025 + // Parameter-resolved constants must not use dotted references + ,.config_file_i(ExampleBlackParrotSystem.cosim_cfg_file_p) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + + ,.interrupt_v_i(be_mem.csr.trap_pkt_cast_o._interrupt) + ,.cause_i(be_mem.csr.trap_pkt_cast_o.cause) + ); +*/ +/*bind bp_be_top + bp_be_nonsynth_perf + #(.bp_params_p(bp_params_p)) + perf + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.fe_nop_i(be_calculator.exc_stage_r[2].fe_nop_v) + ,.be_nop_i(be_calculator.exc_stage_r[2].be_nop_v) + ,.me_nop_i(be_calculator.exc_stage_r[2].me_nop_v) + ,.poison_i(be_calculator.exc_stage_r[2].poison_v) + ,.roll_i(be_calculator.exc_stage_r[2].roll_v) + + ,.instr_cmt_i(be_calculator.commit_pkt.instret) + + ,.program_finish_i(ExampleBlackParrotSystem.program_finish_lo) + ); +*/ + /* bind bp_be_director + bp_be_nonsynth_npc_tracer + #(.bp_params_p(bp_params_p)) + npc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.npc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.npc_w_v(npc_w_v) + ,.npc_n(npc_n) + ,.npc_r(npc_r) + ,.expected_npc_o(expected_npc_o) + + ,.fe_cmd_i(fe_cmd) + ,.fe_cmd_v(fe_cmd_v) + + ,.commit_pkt_i(commit_pkt) + ); +*/ + /*bind bp_be_dcache + bp_be_nonsynth_dcache_tracer + #(.bp_params_p(bp_params_p)) + dcache_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dcache_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(cfg_bus_cast_i.core_id) + + ,.v_tv_r(v_tv_r) + //,.cache_miss_i(cache_miss_i) + + ,.paddr_tv_r(paddr_tv_r) + ,.uncached_tv_r(uncached_tv_r) + ,.load_op_tv_r(load_op_tv_r) + ,.store_op_tv_r(store_op_tv_r) + ,.lr_op_tv_r(lr_op_tv_r) + ,.sc_op_tv_r(sc_op_tv_r) + ,.store_data(data_tv_r) + ,.load_data(data_o) + );*/ +/* + bind bp_be_top + bp_be_nonsynth_calc_tracer + #(.bp_params_p(bp_params_p)) + calc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.calc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.issue_pkt_i(be_checker.scheduler.issue_pkt) + ,.issue_pkt_v_i(be_checker.scheduler.fe_queue_yumi_o) + + ,.fe_nop_v_i(be_calculator.exc_stage_n[0].fe_nop_v) + ,.be_nop_v_i(be_calculator.exc_stage_n[0].be_nop_v) + ,.me_nop_v_i(be_calculator.exc_stage_n[0].me_nop_v) + ,.dispatch_pkt_i(be_calculator.dispatch_pkt) + + ,.ex1_br_tgt_i(be_calculator.calc_status.ex1_npc) + ,.ex1_btaken_i(be_calculator.pipe_int.btaken) + ,.iwb_result_i(be_calculator.comp_stage_n[3]) + ,.fwb_result_i(be_calculator.comp_stage_n[4]) + + ,.cmt_trace_exc_i(be_calculator.exc_stage_n[1+:5]) + + ,.trap_v_i(be_mem.csr.trap_pkt_cast_o._interrupt | be_mem.csr.trap_pkt_cast_o.exception) + ,.mtvec_i(be_mem.csr.mtvec_n) + ,.mtval_i(be_mem.csr.mtval_n[0+:vaddr_width_p]) + ,.ret_v_i(be_mem.csr.trap_pkt_cast_o.eret) + ,.mepc_i(be_mem.csr.mepc_n[0+:vaddr_width_p]) + ,.mcause_i(be_mem.csr.mcause_n) + + ,.priv_mode_i(be_mem.csr.priv_mode_n) + ,.mpp_i(be_mem.csr.mstatus_n.mpp) + ); + + bind bp_core_minimal + bp_be_nonsynth_vm_tracer + #(.bp_params_p(bp_params_p)) + vm_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.vm_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be.be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.itlb_clear_i(fe.mem.itlb.flush_i) + ,.itlb_fill_v_i(fe.mem.itlb.v_i & fe.mem.itlb.w_i) + ,.itlb_vtag_i(fe.mem.itlb.vtag_i) + ,.itlb_entry_i(fe.mem.itlb.entry_i) + + ,.dtlb_clear_i(be.be_mem.dtlb.flush_i) + ,.dtlb_fill_v_i(be.be_mem.dtlb.v_i & be.be_mem.dtlb.w_i) + ,.dtlb_vtag_i(be.be_mem.dtlb.vtag_i) + ,.dtlb_entry_i(be.be_mem.dtlb.entry_i) + ); +*/ +/* bp_mem_nonsynth_tracer + #(.bp_params_p(bp_params_p)) + bp_mem_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dram_trace_p == 1)) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +/*bp_nonsynth_if_verif + #(.bp_params_p(bp_params_p)) + if_verif + (); +*/ +endmodule + diff --git a/litex/soc/cores/cpu/blackparrot/bp_fpga/fpga/ExampleBlackParrotSystem.v b/litex/soc/cores/cpu/blackparrot/bp_fpga/fpga/ExampleBlackParrotSystem.v new file mode 100644 index 00000000..6e52cc20 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/bp_fpga/fpga/ExampleBlackParrotSystem.v @@ -0,0 +1,357 @@ +/** + * + * ExampleBlackParrotSystem.v + * + */ + +`include "bsg_noc_links.vh" + +module ExampleBlackParrotSystem + import bp_common_pkg::*; + import bp_common_aviary_pkg::*; + import bp_be_pkg::*; + import bp_common_rv64_pkg::*; + import bp_cce_pkg::*; + import bp_me_pkg::*; + import bp_common_cfg_link_pkg::*; + import bsg_noc_pkg::*; + #(parameter bp_params_e bp_params_p = e_bp_softcore_cfg + `declare_bp_proc_params(bp_params_p) + `declare_bp_me_if_widths(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + + // Tracing parameters + , parameter calc_trace_p = 0 + , parameter cce_trace_p = 0 + , parameter cmt_trace_p = 1 + , parameter dram_trace_p = 1 + , parameter npc_trace_p = 0 + , parameter dcache_trace_p = 0 + , parameter vm_trace_p = 0 + , parameter preload_mem_p = 1 + , parameter load_nbf_p = 0 + , parameter skip_init_p = 0 + , parameter cosim_p = 0 + , parameter cosim_cfg_file_p = "prog.cfg" + + , parameter mem_zero_p = 1 + , parameter mem_file_p = "prog.mem" + , parameter mem_cap_in_bytes_p = 2**25 + , parameter [paddr_width_p-1:0] mem_offset_p = paddr_width_p'(32'h8000_0000) + + // Number of elements in the fake BlackParrot memory + , parameter use_max_latency_p = 1 + , parameter use_random_latency_p = 0 + , parameter use_dramsim2_latency_p = 0 + + , parameter max_latency_p = 15 + + , parameter dram_clock_period_in_ps_p = 1000 + , parameter dram_cfg_p = "dram_ch.ini" + , parameter dram_sys_cfg_p = "dram_sys.ini" + , parameter dram_capacity_p = 16384 + ) + (input clk_i + , input reset_i + //Wishbone interface + , input [63:0] wbm_dat_i + , output [63:0] wbm_dat_o + , input wbm_ack_i + , input wbm_err_i +// , input wbm_rty_i + , output [36:0] wbm_adr_o //TODO parametrize this + , output wbm_stb_o + , output wbm_cyc_o + , output [7:0] wbm_sel_o //TODO: how many bits ? check + , output wbm_we_o + , output [2:0] wbm_cti_o //TODO: + , output [1:0] wbm_bte_o + // , input [3:0] interrupts + ); + +`declare_bp_me_if(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + +bp_cce_mem_msg_s proc_mem_cmd_lo; +logic proc_mem_cmd_v_lo, proc_mem_cmd_ready_li; +bp_cce_mem_msg_s proc_mem_resp_li; +logic proc_mem_resp_v_li, proc_mem_resp_yumi_lo; + +bp_cce_mem_msg_s proc_io_cmd_lo; +logic proc_io_cmd_v_lo, proc_io_cmd_ready_li; +bp_cce_mem_msg_s proc_io_resp_li; +logic proc_io_resp_v_li, proc_io_resp_yumi_lo; + +bp_cce_mem_msg_s io_cmd_lo; +logic io_cmd_v_lo, io_cmd_ready_li; +bp_cce_mem_msg_s io_resp_li; +logic io_resp_v_li, io_resp_yumi_lo; +bp_softcore + #(.bp_params_p(bp_params_p)) + softcore + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_o(proc_io_cmd_lo) + ,.io_cmd_v_o(proc_io_cmd_v_lo) + ,.io_cmd_ready_i(proc_io_cmd_ready_li) + + ,.io_resp_i(proc_io_resp_li) + ,.io_resp_v_i(proc_io_resp_v_li) + ,.io_resp_yumi_o(proc_io_resp_yumi_lo) + + ,.mem_cmd_o(proc_mem_cmd_lo) + ,.mem_cmd_v_o(proc_mem_cmd_v_lo) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_o(proc_mem_resp_yumi_lo) + ); + + bp2wb_convertor + #(.bp_params_p(bp_params_p)) + bp2wb + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + + ,.dat_i(wbm_dat_i) + ,.dat_o(wbm_dat_o) + ,.ack_i(wbm_ack_i) + ,.adr_o(wbm_adr_o) + ,.stb_o(wbm_stb_o) + ,.cyc_o(wbm_cyc_o) + ,.sel_o(wbm_sel_o ) + ,.we_o(wbm_we_o) + ,.cti_o(wbm_cti_o) + ,.bte_o(wbm_bte_o ) + // ,.rty_i(wbm_rty_i) + ,.err_i(wbm_err_i) + ); + +/* +bp_mem + mem + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +logic program_finish_lo; +assign proc_io_cmd_ready_li = 1; +/*bp_nonsynth_host + #(.bp_params_p(bp_params_p)) + host + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_i(proc_io_cmd_lo) + ,.io_cmd_v_i(proc_io_cmd_v_lo & proc_io_cmd_ready_li) + ,.io_cmd_ready_o(proc_io_cmd_ready_li) + + ,.io_resp_o(proc_io_resp_li) + ,.io_resp_v_o(proc_io_resp_v_li) + ,.io_resp_yumi_i(proc_io_resp_yumi_lo) + + ,.program_finish_o(program_finish_lo) + ); +*/ +/*bind bp_be_top + bp_nonsynth_commit_tracer + #(.bp_params_p(bp_params_p)) + commit_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.cmt_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i('0) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + ); +*/ +/* bind bp_be_top + bp_nonsynth_cosim + #(.bp_params_p(bp_params_p)) + cosim + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.en_i(ExampleBlackParrotSystem.cosim_p == 1) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + // Want to pass config file as a parameter, but cannot in Verilator 4.025 + // Parameter-resolved constants must not use dotted references + ,.config_file_i(ExampleBlackParrotSystem.cosim_cfg_file_p) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + + ,.interrupt_v_i(be_mem.csr.trap_pkt_cast_o._interrupt) + ,.cause_i(be_mem.csr.trap_pkt_cast_o.cause) + ); +*/ +/*bind bp_be_top + bp_be_nonsynth_perf + #(.bp_params_p(bp_params_p)) + perf + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.fe_nop_i(be_calculator.exc_stage_r[2].fe_nop_v) + ,.be_nop_i(be_calculator.exc_stage_r[2].be_nop_v) + ,.me_nop_i(be_calculator.exc_stage_r[2].me_nop_v) + ,.poison_i(be_calculator.exc_stage_r[2].poison_v) + ,.roll_i(be_calculator.exc_stage_r[2].roll_v) + + ,.instr_cmt_i(be_calculator.commit_pkt.instret) + + ,.program_finish_i(ExampleBlackParrotSystem.program_finish_lo) + ); +*/ + /* bind bp_be_director + bp_be_nonsynth_npc_tracer + #(.bp_params_p(bp_params_p)) + npc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.npc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.npc_w_v(npc_w_v) + ,.npc_n(npc_n) + ,.npc_r(npc_r) + ,.expected_npc_o(expected_npc_o) + + ,.fe_cmd_i(fe_cmd) + ,.fe_cmd_v(fe_cmd_v) + + ,.commit_pkt_i(commit_pkt) + ); +*/ + /*bind bp_be_dcache + bp_be_nonsynth_dcache_tracer + #(.bp_params_p(bp_params_p)) + dcache_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dcache_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(cfg_bus_cast_i.core_id) + + ,.v_tv_r(v_tv_r) + //,.cache_miss_i(cache_miss_i) + + ,.paddr_tv_r(paddr_tv_r) + ,.uncached_tv_r(uncached_tv_r) + ,.load_op_tv_r(load_op_tv_r) + ,.store_op_tv_r(store_op_tv_r) + ,.lr_op_tv_r(lr_op_tv_r) + ,.sc_op_tv_r(sc_op_tv_r) + ,.store_data(data_tv_r) + ,.load_data(data_o) + );*/ +/* + bind bp_be_top + bp_be_nonsynth_calc_tracer + #(.bp_params_p(bp_params_p)) + calc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.calc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.issue_pkt_i(be_checker.scheduler.issue_pkt) + ,.issue_pkt_v_i(be_checker.scheduler.fe_queue_yumi_o) + + ,.fe_nop_v_i(be_calculator.exc_stage_n[0].fe_nop_v) + ,.be_nop_v_i(be_calculator.exc_stage_n[0].be_nop_v) + ,.me_nop_v_i(be_calculator.exc_stage_n[0].me_nop_v) + ,.dispatch_pkt_i(be_calculator.dispatch_pkt) + + ,.ex1_br_tgt_i(be_calculator.calc_status.ex1_npc) + ,.ex1_btaken_i(be_calculator.pipe_int.btaken) + ,.iwb_result_i(be_calculator.comp_stage_n[3]) + ,.fwb_result_i(be_calculator.comp_stage_n[4]) + + ,.cmt_trace_exc_i(be_calculator.exc_stage_n[1+:5]) + + ,.trap_v_i(be_mem.csr.trap_pkt_cast_o._interrupt | be_mem.csr.trap_pkt_cast_o.exception) + ,.mtvec_i(be_mem.csr.mtvec_n) + ,.mtval_i(be_mem.csr.mtval_n[0+:vaddr_width_p]) + ,.ret_v_i(be_mem.csr.trap_pkt_cast_o.eret) + ,.mepc_i(be_mem.csr.mepc_n[0+:vaddr_width_p]) + ,.mcause_i(be_mem.csr.mcause_n) + + ,.priv_mode_i(be_mem.csr.priv_mode_n) + ,.mpp_i(be_mem.csr.mstatus_n.mpp) + ); + + bind bp_core_minimal + bp_be_nonsynth_vm_tracer + #(.bp_params_p(bp_params_p)) + vm_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.vm_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be.be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.itlb_clear_i(fe.mem.itlb.flush_i) + ,.itlb_fill_v_i(fe.mem.itlb.v_i & fe.mem.itlb.w_i) + ,.itlb_vtag_i(fe.mem.itlb.vtag_i) + ,.itlb_entry_i(fe.mem.itlb.entry_i) + + ,.dtlb_clear_i(be.be_mem.dtlb.flush_i) + ,.dtlb_fill_v_i(be.be_mem.dtlb.v_i & be.be_mem.dtlb.w_i) + ,.dtlb_vtag_i(be.be_mem.dtlb.vtag_i) + ,.dtlb_entry_i(be.be_mem.dtlb.entry_i) + ); +*/ +/* bp_mem_nonsynth_tracer + #(.bp_params_p(bp_params_p)) + bp_mem_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dram_trace_p == 1)) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +/*bp_nonsynth_if_verif + #(.bp_params_p(bp_params_p)) + if_verif + (); +*/ +endmodule + diff --git a/litex/soc/cores/cpu/blackparrot/bp_fpga/simulation/ExampleBlackParrotSystem.v b/litex/soc/cores/cpu/blackparrot/bp_fpga/simulation/ExampleBlackParrotSystem.v new file mode 100644 index 00000000..48fa4b48 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/bp_fpga/simulation/ExampleBlackParrotSystem.v @@ -0,0 +1,357 @@ +/** + * + * ExampleBlackParrotSystem.v + * + */ + +`include "bsg_noc_links.vh" + +module ExampleBlackParrotSystem + import bp_common_pkg::*; + import bp_common_aviary_pkg::*; + import bp_be_pkg::*; + import bp_common_rv64_pkg::*; + import bp_cce_pkg::*; + import bp_me_pkg::*; + import bp_common_cfg_link_pkg::*; + import bsg_noc_pkg::*; + #(parameter bp_params_e bp_params_p = e_bp_softcore_cfg + `declare_bp_proc_params(bp_params_p) + `declare_bp_me_if_widths(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + + // Tracing parameters + , parameter calc_trace_p = 0 + , parameter cce_trace_p = 0 + , parameter cmt_trace_p = 1 + , parameter dram_trace_p = 1 + , parameter npc_trace_p = 0 + , parameter dcache_trace_p = 0 + , parameter vm_trace_p = 0 + , parameter preload_mem_p = 1 + , parameter load_nbf_p = 0 + , parameter skip_init_p = 0 + , parameter cosim_p = 0 + , parameter cosim_cfg_file_p = "prog.cfg" + + , parameter mem_zero_p = 1 + , parameter mem_file_p = "prog.mem" + , parameter mem_cap_in_bytes_p = 2**25 + , parameter [paddr_width_p-1:0] mem_offset_p = paddr_width_p'(32'h8000_0000) + + // Number of elements in the fake BlackParrot memory + , parameter use_max_latency_p = 1 + , parameter use_random_latency_p = 0 + , parameter use_dramsim2_latency_p = 0 + + , parameter max_latency_p = 15 + + , parameter dram_clock_period_in_ps_p = 1000 + , parameter dram_cfg_p = "dram_ch.ini" + , parameter dram_sys_cfg_p = "dram_sys.ini" + , parameter dram_capacity_p = 16384 + ) + (input clk_i + , input reset_i + //Wishbone interface + , input [63:0] wbm_dat_i + , output [63:0] wbm_dat_o + , input wbm_ack_i + , input wbm_err_i +// , input wbm_rty_i + , output [36:0] wbm_adr_o //TODO parametrize this + , output wbm_stb_o + , output wbm_cyc_o + , output [7:0] wbm_sel_o //TODO: how many bits ? check + , output wbm_we_o + , output [2:0] wbm_cti_o //TODO: + , output [1:0] wbm_bte_o + // , input [3:0] interrupts + ); + +`declare_bp_me_if(paddr_width_p, cce_block_width_p, lce_id_width_p, lce_assoc_p) + +bp_cce_mem_msg_s proc_mem_cmd_lo; +logic proc_mem_cmd_v_lo, proc_mem_cmd_ready_li; +bp_cce_mem_msg_s proc_mem_resp_li; +logic proc_mem_resp_v_li, proc_mem_resp_yumi_lo; + +bp_cce_mem_msg_s proc_io_cmd_lo; +logic proc_io_cmd_v_lo, proc_io_cmd_ready_li; +bp_cce_mem_msg_s proc_io_resp_li; +logic proc_io_resp_v_li, proc_io_resp_yumi_lo; + +bp_cce_mem_msg_s io_cmd_lo; +logic io_cmd_v_lo, io_cmd_ready_li; +bp_cce_mem_msg_s io_resp_li; +logic io_resp_v_li, io_resp_yumi_lo; +bp_softcore + #(.bp_params_p(bp_params_p)) + softcore + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_o(proc_io_cmd_lo) + ,.io_cmd_v_o(proc_io_cmd_v_lo) + ,.io_cmd_ready_i(proc_io_cmd_ready_li) + + ,.io_resp_i(proc_io_resp_li) + ,.io_resp_v_i(proc_io_resp_v_li) + ,.io_resp_yumi_o(proc_io_resp_yumi_lo) + + ,.mem_cmd_o(proc_mem_cmd_lo) + ,.mem_cmd_v_o(proc_mem_cmd_v_lo) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_o(proc_mem_resp_yumi_lo) + ); + + bp2wb_convertor + #(.bp_params_p(bp_params_p)) + bp2wb + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + + ,.dat_i(wbm_dat_i) + ,.dat_o(wbm_dat_o) + ,.ack_i(wbm_ack_i) + ,.adr_o(wbm_adr_o) + ,.stb_o(wbm_stb_o) + ,.cyc_o(wbm_cyc_o) + ,.sel_o(wbm_sel_o ) + ,.we_o(wbm_we_o) + ,.cti_o(wbm_cti_o) + ,.bte_o(wbm_bte_o ) + // ,.rty_i(wbm_rty_i) + ,.err_i(wbm_err_i) + ); + +/* +bp_mem + mem + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_o(proc_mem_cmd_ready_li) + + ,.mem_resp_o(proc_mem_resp_li) + ,.mem_resp_v_o(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); +*/ +logic program_finish_lo; +assign proc_io_cmd_ready_li = 1; +/*bp_nonsynth_host + #(.bp_params_p(bp_params_p)) + host + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.io_cmd_i(proc_io_cmd_lo) + ,.io_cmd_v_i(proc_io_cmd_v_lo & proc_io_cmd_ready_li) + ,.io_cmd_ready_o(proc_io_cmd_ready_li) + + ,.io_resp_o(proc_io_resp_li) + ,.io_resp_v_o(proc_io_resp_v_li) + ,.io_resp_yumi_i(proc_io_resp_yumi_lo) + + ,.program_finish_o(program_finish_lo) + ); +*/ +bind bp_be_top + bp_nonsynth_commit_tracer + #(.bp_params_p(bp_params_p)) + commit_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.cmt_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i('0) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + ); + +/* bind bp_be_top + bp_nonsynth_cosim + #(.bp_params_p(bp_params_p)) + cosim + (.clk_i(clk_i) + ,.reset_i(reset_i) + ,.en_i(ExampleBlackParrotSystem.cosim_p == 1) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + // Want to pass config file as a parameter, but cannot in Verilator 4.025 + // Parameter-resolved constants must not use dotted references + ,.config_file_i(ExampleBlackParrotSystem.cosim_cfg_file_p) + + ,.commit_v_i(be_calculator.commit_pkt.instret) + ,.commit_pc_i(be_calculator.commit_pkt.pc) + ,.commit_instr_i(be_calculator.commit_pkt.instr) + + ,.rd_w_v_i(be_calculator.wb_pkt.rd_w_v) + ,.rd_addr_i(be_calculator.wb_pkt.rd_addr) + ,.rd_data_i(be_calculator.wb_pkt.rd_data) + + ,.interrupt_v_i(be_mem.csr.trap_pkt_cast_o._interrupt) + ,.cause_i(be_mem.csr.trap_pkt_cast_o.cause) + ); +*/ +/*bind bp_be_top + bp_be_nonsynth_perf + #(.bp_params_p(bp_params_p)) + perf + (.clk_i(clk_i) + ,.reset_i(reset_i) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.fe_nop_i(be_calculator.exc_stage_r[2].fe_nop_v) + ,.be_nop_i(be_calculator.exc_stage_r[2].be_nop_v) + ,.me_nop_i(be_calculator.exc_stage_r[2].me_nop_v) + ,.poison_i(be_calculator.exc_stage_r[2].poison_v) + ,.roll_i(be_calculator.exc_stage_r[2].roll_v) + + ,.instr_cmt_i(be_calculator.commit_pkt.instret) + + ,.program_finish_i(ExampleBlackParrotSystem.program_finish_lo) + ); +*/ + /* bind bp_be_director + bp_be_nonsynth_npc_tracer + #(.bp_params_p(bp_params_p)) + npc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.npc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.npc_w_v(npc_w_v) + ,.npc_n(npc_n) + ,.npc_r(npc_r) + ,.expected_npc_o(expected_npc_o) + + ,.fe_cmd_i(fe_cmd) + ,.fe_cmd_v(fe_cmd_v) + + ,.commit_pkt_i(commit_pkt) + ); +*/ + /*bind bp_be_dcache + bp_be_nonsynth_dcache_tracer + #(.bp_params_p(bp_params_p)) + dcache_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dcache_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(cfg_bus_cast_i.core_id) + + ,.v_tv_r(v_tv_r) + //,.cache_miss_i(cache_miss_i) + + ,.paddr_tv_r(paddr_tv_r) + ,.uncached_tv_r(uncached_tv_r) + ,.load_op_tv_r(load_op_tv_r) + ,.store_op_tv_r(store_op_tv_r) + ,.lr_op_tv_r(lr_op_tv_r) + ,.sc_op_tv_r(sc_op_tv_r) + ,.store_data(data_tv_r) + ,.load_data(data_o) + );*/ +/* + bind bp_be_top + bp_be_nonsynth_calc_tracer + #(.bp_params_p(bp_params_p)) + calc_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.calc_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.issue_pkt_i(be_checker.scheduler.issue_pkt) + ,.issue_pkt_v_i(be_checker.scheduler.fe_queue_yumi_o) + + ,.fe_nop_v_i(be_calculator.exc_stage_n[0].fe_nop_v) + ,.be_nop_v_i(be_calculator.exc_stage_n[0].be_nop_v) + ,.me_nop_v_i(be_calculator.exc_stage_n[0].me_nop_v) + ,.dispatch_pkt_i(be_calculator.dispatch_pkt) + + ,.ex1_br_tgt_i(be_calculator.calc_status.ex1_npc) + ,.ex1_btaken_i(be_calculator.pipe_int.btaken) + ,.iwb_result_i(be_calculator.comp_stage_n[3]) + ,.fwb_result_i(be_calculator.comp_stage_n[4]) + + ,.cmt_trace_exc_i(be_calculator.exc_stage_n[1+:5]) + + ,.trap_v_i(be_mem.csr.trap_pkt_cast_o._interrupt | be_mem.csr.trap_pkt_cast_o.exception) + ,.mtvec_i(be_mem.csr.mtvec_n) + ,.mtval_i(be_mem.csr.mtval_n[0+:vaddr_width_p]) + ,.ret_v_i(be_mem.csr.trap_pkt_cast_o.eret) + ,.mepc_i(be_mem.csr.mepc_n[0+:vaddr_width_p]) + ,.mcause_i(be_mem.csr.mcause_n) + + ,.priv_mode_i(be_mem.csr.priv_mode_n) + ,.mpp_i(be_mem.csr.mstatus_n.mpp) + ); + + bind bp_core_minimal + bp_be_nonsynth_vm_tracer + #(.bp_params_p(bp_params_p)) + vm_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.vm_trace_p == 1)) + ,.reset_i(reset_i) + ,.freeze_i('0) + + ,.mhartid_i(be.be_checker.scheduler.int_regfile.cfg_bus.core_id) + + ,.itlb_clear_i(fe.mem.itlb.flush_i) + ,.itlb_fill_v_i(fe.mem.itlb.v_i & fe.mem.itlb.w_i) + ,.itlb_vtag_i(fe.mem.itlb.vtag_i) + ,.itlb_entry_i(fe.mem.itlb.entry_i) + + ,.dtlb_clear_i(be.be_mem.dtlb.flush_i) + ,.dtlb_fill_v_i(be.be_mem.dtlb.v_i & be.be_mem.dtlb.w_i) + ,.dtlb_vtag_i(be.be_mem.dtlb.vtag_i) + ,.dtlb_entry_i(be.be_mem.dtlb.entry_i) + ); +*/ + bp_mem_nonsynth_tracer + #(.bp_params_p(bp_params_p)) + bp_mem_tracer + (.clk_i(clk_i & (ExampleBlackParrotSystem.dram_trace_p == 1)) + ,.reset_i(reset_i) + + ,.mem_cmd_i(proc_mem_cmd_lo) + ,.mem_cmd_v_i(proc_mem_cmd_v_lo & proc_mem_cmd_ready_li) + ,.mem_cmd_ready_i(proc_mem_cmd_ready_li) + + ,.mem_resp_i(proc_mem_resp_li) + ,.mem_resp_v_i(proc_mem_resp_v_li) + ,.mem_resp_yumi_i(proc_mem_resp_yumi_lo) + ); + +/*bp_nonsynth_if_verif + #(.bp_params_p(bp_params_p)) + if_verif + (); +*/ +endmodule + diff --git a/litex/soc/cores/cpu/blackparrot/flist.fpga b/litex/soc/cores/cpu/blackparrot/flist.fpga new file mode 100644 index 00000000..6ca19de8 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/flist.fpga @@ -0,0 +1,250 @@ ++incdir+$BASEJUMP_STL_DIR/bsg_dataflow ++incdir+$BASEJUMP_STL_DIR/bsg_mem ++incdir+$BASEJUMP_STL_DIR/bsg_misc ++incdir+$BASEJUMP_STL_DIR/bsg_test ++incdir+$BASEJUMP_STL_DIR/bsg_noc ++incdir+$BP_COMMON_DIR/src/include ++incdir+$BP_FE_DIR/src/include ++incdir+$BP_BE_DIR/src/include ++incdir+$BP_BE_DIR/src/include/bp_be_dcache ++incdir+$BP_ME_DIR/src/include/v ++incdir+$BP_TOP_DIR/src/include +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_pkg.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_noc_pkg.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_pkg.v +$BP_COMMON_DIR/src/include/bp_common_rv64_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_aviary_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_cfg_link_pkg.vh +$BP_FE_DIR/src/include/bp_fe_icache_pkg.vh +$BP_FE_DIR/src/include/bp_fe_pkg.vh +$BP_BE_DIR/src/include/bp_be_pkg.vh +$BP_BE_DIR/src/include/bp_be_dcache/bp_be_dcache_pkg.vh +$BP_ME_DIR/src/include/v/bp_cce_pkg.v +$BP_ME_DIR/src/include/v/bp_me_pkg.vh +$BASEJUMP_STL_DIR/bsg_async/bsg_async_fifo.v +$BASEJUMP_STL_DIR/bsg_async/bsg_launch_sync_sync.v +$BASEJUMP_STL_DIR/bsg_async/bsg_async_ptr_gray.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_dma.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_miss.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_decode.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_sbuf.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_sbuf_queue.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel_in.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_1_to_n_tagged_fifo.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_1_to_n_tagged.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_pseudo_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_small.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_small_unhardened.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1rw_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_tracker.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_flow_counter.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_one_fifo.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_parallel_in_serial_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_parallel_in_serial_out_dynamic.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_1_to_n.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_2_to_2.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_n_to_1.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out_dynamic.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out_full.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_shift_reg.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_two_fifo.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_cam_1r1w.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_sync.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_sync_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync.v +//$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_bit.v +$BP_FPGA_DIR/bsg_mem_1rw_sync_mask_write_bit.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_bit_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_byte.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_byte_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_2r1w_sync.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_2r1w_sync_synth.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_adder_ripple_carry.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_arb_fixed.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_array_concentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_buf.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_circular_ptr.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_concentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_clear_up.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_set_down.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_set_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_up_down.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_up_down_variable.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_crossbar_o_by_i.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_cycle_counter.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_decode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_decode_with_v.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_en_bypass.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset_en_bypass.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_chain.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_edge_detect.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_encode_one_hot.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_expand_bitmask.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_hash_bank.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_hash_bank_reverse.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lfsr.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lru_pseudo_tree_decode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lru_pseudo_tree_encode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_butterfly.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_one_hot.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_segmented.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_muxi2_gatestack.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_nor3.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_nand.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_priority_encode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_priority_encode_one_hot_out.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_reduce.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_reduce_segmented.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_round_robin_arb.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_scan.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_strobe.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_swap.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_thermometer_count.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_transpose.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_unconcentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_xnor.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_mesh_stitch.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_noc_repeater_node.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator_in.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator_out.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter_in.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter_out.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_decoder_dor.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_input_control.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_output_control.v +$BP_COMMON_DIR/src/v/bsg_fifo_1r1w_rolly.v +$BP_COMMON_DIR/src/v/bp_pma.v +$BP_COMMON_DIR/src/v/bp_tlb.v +$BP_COMMON_DIR/src/v/bp_tlb_replacement.v +$BP_BE_DIR/src/v/bp_be_top.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_bypass.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_calculator_top.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_instr_decoder.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_int_alu.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_fp.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_int.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_mem.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_mul.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_regfile.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_checker_top.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_detector.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_director.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_scheduler.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_ptw.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_csr.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce_cmd.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce_req.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_wbuf.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_wbuf_queue.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_mem_top.v +$BP_FE_DIR/src/v/bp_fe_bht.v +$BP_FE_DIR/src/v/bp_fe_btb.v +$BP_FE_DIR/src/v/bp_fe_lce_cmd.v +$BP_FE_DIR/src/v/bp_fe_icache.v +$BP_FE_DIR/src/v/bp_fe_instr_scan.v +$BP_FE_DIR/src/v/bp_fe_lce.v +$BP_FE_DIR/src/v/bp_fe_lce_req.v +$BP_FE_DIR/src/v/bp_fe_mem.v +$BP_FE_DIR/src/v/bp_fe_pc_gen.v +$BP_FE_DIR/src/v/bp_fe_top.v +$BP_ME_DIR/src/v/cache/bp_me_cache_dma_to_cce.v +$BP_ME_DIR/src/v/cache/bp_me_cache_slice.v +$BP_ME_DIR/src/v/cache/bp_me_cce_to_cache.v +$BP_ME_DIR/src/v/cache/bp_me_cce_to_cache_buffered.v +$BP_ME_DIR/src/v/cce/bp_cce.v +$BP_ME_DIR/src/v/cce/bp_cce_alu.v +$BP_ME_DIR/src/v/cce/bp_cce_buffered.v +$BP_ME_DIR/src/v/cce/bp_cce_dir.v +$BP_ME_DIR/src/v/cce/bp_cce_dir_tag_checker.v +$BP_ME_DIR/src/v/cce/bp_cce_dir_lru_extract.v +$BP_ME_DIR/src/v/cce/bp_cce_gad.v +$BP_ME_DIR/src/v/cce/bp_cce_inst_decode.v +$BP_ME_DIR/src/v/cce/bp_cce_msg.v +$BP_ME_DIR/src/v/cce/bp_cce_msg_cached.v +$BP_ME_DIR/src/v/cce/bp_cce_msg_uncached.v +$BP_ME_DIR/src/v/cce/bp_cce_pc.v +$BP_ME_DIR/src/v/cce/bp_cce_pending.v +$BP_ME_DIR/src/v/cce/bp_cce_reg.v +$BP_ME_DIR/src/v/cce/bp_cce_spec.v +$BP_ME_DIR/src/v/cce/bp_io_cce.v +$BP_ME_DIR/src/v/cce/bp_uce.v +$BP_ME_DIR/src/v/wormhole/bp_me_addr_to_cce_id.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_id_to_cord.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_bidir.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_client.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_master.v +$BP_ME_DIR/src/v/wormhole/bp_me_cord_to_id.v +$BP_ME_DIR/src/v/wormhole/bp_me_lce_id_to_cord.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_cmd.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_req.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_resp.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_mem_cmd.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_mem_resp.v +//$BP_TOP_DIR/src/v/bp_accelerator_complex.v +$BP_TOP_DIR/src/v/bp_cfg.v +$BP_TOP_DIR/src/v/bp_cfg_buffered.v +$BP_TOP_DIR/src/v/bp_core.v +//$BP_TOP_DIR/src/v/bp_core_complex.v +$BP_TOP_DIR/src/v/bp_core_minimal.v +//$BP_TOP_DIR/src/v/bp_clint.v +$BP_TOP_DIR/src/v/bp_clint_node.v +$BP_TOP_DIR/src/v/bp_clint_slice.v +$BP_TOP_DIR/src/v/bp_clint_slice_buffered.v +//$BP_TOP_DIR/src/v/bp_l2e_tile.v +//$BP_TOP_DIR/src/v/bp_l2e_tile_node.v +$BP_TOP_DIR/src/v/bp_io_complex.v +$BP_TOP_DIR/src/v/bp_io_link_to_lce.v +$BP_TOP_DIR/src/v/bp_io_tile.v +$BP_TOP_DIR/src/v/bp_io_tile_node.v +$BP_TOP_DIR/src/v/bp_mem_complex.v +//$BP_TOP_DIR/src/v/bp_processor.v +$BP_TOP_DIR/src/v/bp_softcore.v +//$BP_TOP_DIR/src/v/bp_tile.v +//$BP_TOP_DIR/src/v/bp_tile_node.v +$BP_TOP_DIR/src/v/bsg_async_noc_link.v +//$BASEJUMP_STL_DIR/bsg_test/bsg_nonsynth_reset_gen.v +//$BASEJUMP_STL_DIR/bsg_test/bsg_nonsynth_clock_gen.v +//$BASEJUMP_STL_DIR/bsg_fsb/bsg_fsb_node_trace_replay.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_calc_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_dcache_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_perf.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_npc_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_vm_tracer.v +//$BP_ME_DIR/test/common/bp_mem.v +//$BP_ME_DIR/test/common/bp_mem_transducer.v +//$BP_ME_DIR/test/common/bp_mem_delay_model.v +//$BP_ME_DIR/test/common/bp_mem_storage_sync.v +//$BP_ME_DIR/test/common/bp_cce_mmio_cfg_loader.v +//$BP_ME_DIR/test/common/dramsim2_wrapper.cpp +//$BP_ME_DIR/test/common/bp_mem_utils.cpp +//$BP_ME_DIR/test/common/bp_cce_nonsynth_tracer.v +$BP_ME_DIR/test/common/bp_mem_nonsynth_tracer.v +//$BP_TOP_DIR/test/common/bp_nonsynth_cosim.v +//$BP_TOP_DIR/test/common/bp_nonsynth_host.v +//$BP_TOP_DIR/test/common/bp_nonsynth_if_verif.v +$BP_TOP_DIR/test/common/bp_nonsynth_commit_tracer.v +//$BP_TOP_DIR/test/common/bp_nonsynth_nbf_loader.v +//$BP_TOP_DIR/test/common/bp_monitor.cpp +//$BP_TOP_DIR/test/common/dromajo_cosim.cpp +//$BP_FPGA_DIR/wrapper.v +$BP_FPGA_DIR/bp2wb_convertor.v +$BP_FPGA_DIR/fpga/ExampleBlackParrotSystem.v diff --git a/litex/soc/cores/cpu/blackparrot/flist.verilator b/litex/soc/cores/cpu/blackparrot/flist.verilator new file mode 100644 index 00000000..551f5ea5 --- /dev/null +++ b/litex/soc/cores/cpu/blackparrot/flist.verilator @@ -0,0 +1,250 @@ ++incdir+$BASEJUMP_STL_DIR/bsg_dataflow ++incdir+$BASEJUMP_STL_DIR/bsg_mem ++incdir+$BASEJUMP_STL_DIR/bsg_misc ++incdir+$BASEJUMP_STL_DIR/bsg_test ++incdir+$BASEJUMP_STL_DIR/bsg_noc ++incdir+$BP_COMMON_DIR/src/include ++incdir+$BP_FE_DIR/src/include ++incdir+$BP_BE_DIR/src/include ++incdir+$BP_BE_DIR/src/include/bp_be_dcache ++incdir+$BP_ME_DIR/src/include/v ++incdir+$BP_TOP_DIR/src/include +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_pkg.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_noc_pkg.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_pkg.v +$BP_COMMON_DIR/src/include/bp_common_rv64_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_aviary_pkg.vh +$BP_COMMON_DIR/src/include/bp_common_cfg_link_pkg.vh +$BP_FE_DIR/src/include/bp_fe_icache_pkg.vh +$BP_FE_DIR/src/include/bp_fe_pkg.vh +$BP_BE_DIR/src/include/bp_be_pkg.vh +$BP_BE_DIR/src/include/bp_be_dcache/bp_be_dcache_pkg.vh +$BP_ME_DIR/src/include/v/bp_cce_pkg.v +$BP_ME_DIR/src/include/v/bp_me_pkg.vh +$BASEJUMP_STL_DIR/bsg_async/bsg_async_fifo.v +$BASEJUMP_STL_DIR/bsg_async/bsg_launch_sync_sync.v +$BASEJUMP_STL_DIR/bsg_async/bsg_async_ptr_gray.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_dma.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_miss.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_decode.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_sbuf.v +$BASEJUMP_STL_DIR/bsg_cache/bsg_cache_sbuf_queue.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel_in.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_channel_tunnel_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_1_to_n_tagged_fifo.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_1_to_n_tagged.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_pseudo_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_small.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1r1w_small_unhardened.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_1rw_large.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_fifo_tracker.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_flow_counter.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_one_fifo.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_parallel_in_serial_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_parallel_in_serial_out_dynamic.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_1_to_n.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_2_to_2.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_round_robin_n_to_1.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out_dynamic.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_serial_in_parallel_out_full.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_shift_reg.v +$BASEJUMP_STL_DIR/bsg_dataflow/bsg_two_fifo.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_cam_1r1w.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_sync.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_sync_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1r1w_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync.v +//$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_bit.v +$BP_FPGA_DIR/bsg_mem_1rw_sync_mask_write_bit.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_bit_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_byte.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_mask_write_byte_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_1rw_sync_synth.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_2r1w_sync.v +$BASEJUMP_STL_DIR/bsg_mem/bsg_mem_2r1w_sync_synth.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_adder_ripple_carry.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_arb_fixed.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_array_concentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_buf.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_circular_ptr.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_concentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_clear_up.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_set_down.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_set_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_up_down.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_counter_up_down_variable.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_crossbar_o_by_i.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_cycle_counter.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_decode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_decode_with_v.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_en_bypass.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset_en_bypass.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_chain.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_dff_reset_en.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_edge_detect.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_encode_one_hot.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_expand_bitmask.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_hash_bank.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_hash_bank_reverse.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lfsr.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lru_pseudo_tree_decode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_lru_pseudo_tree_encode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_butterfly.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_one_hot.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_mux_segmented.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_muxi2_gatestack.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_nor3.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_nand.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_priority_encode.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_priority_encode_one_hot_out.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_reduce.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_reduce_segmented.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_round_robin_arb.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_scan.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_strobe.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_swap.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_thermometer_count.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_transpose.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_unconcentrate_static.v +$BASEJUMP_STL_DIR/bsg_misc/bsg_xnor.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_mesh_stitch.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_noc_repeater_node.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator_in.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_concentrator_out.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter_in.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_adapter_out.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_decoder_dor.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_input_control.v +$BASEJUMP_STL_DIR/bsg_noc/bsg_wormhole_router_output_control.v +$BP_COMMON_DIR/src/v/bsg_fifo_1r1w_rolly.v +$BP_COMMON_DIR/src/v/bp_pma.v +$BP_COMMON_DIR/src/v/bp_tlb.v +$BP_COMMON_DIR/src/v/bp_tlb_replacement.v +$BP_BE_DIR/src/v/bp_be_top.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_bypass.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_calculator_top.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_instr_decoder.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_int_alu.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_fp.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_int.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_mem.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_pipe_mul.v +$BP_BE_DIR/src/v/bp_be_calculator/bp_be_regfile.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_checker_top.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_detector.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_director.v +$BP_BE_DIR/src/v/bp_be_checker/bp_be_scheduler.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_ptw.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_csr.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce_cmd.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_lce_req.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_wbuf.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_dcache/bp_be_dcache_wbuf_queue.v +$BP_BE_DIR/src/v/bp_be_mem/bp_be_mem_top.v +$BP_FE_DIR/src/v/bp_fe_bht.v +$BP_FE_DIR/src/v/bp_fe_btb.v +$BP_FE_DIR/src/v/bp_fe_lce_cmd.v +$BP_FE_DIR/src/v/bp_fe_icache.v +$BP_FE_DIR/src/v/bp_fe_instr_scan.v +$BP_FE_DIR/src/v/bp_fe_lce.v +$BP_FE_DIR/src/v/bp_fe_lce_req.v +$BP_FE_DIR/src/v/bp_fe_mem.v +$BP_FE_DIR/src/v/bp_fe_pc_gen.v +$BP_FE_DIR/src/v/bp_fe_top.v +$BP_ME_DIR/src/v/cache/bp_me_cache_dma_to_cce.v +$BP_ME_DIR/src/v/cache/bp_me_cache_slice.v +$BP_ME_DIR/src/v/cache/bp_me_cce_to_cache.v +$BP_ME_DIR/src/v/cache/bp_me_cce_to_cache_buffered.v +$BP_ME_DIR/src/v/cce/bp_cce.v +$BP_ME_DIR/src/v/cce/bp_cce_alu.v +$BP_ME_DIR/src/v/cce/bp_cce_buffered.v +$BP_ME_DIR/src/v/cce/bp_cce_dir.v +$BP_ME_DIR/src/v/cce/bp_cce_dir_tag_checker.v +$BP_ME_DIR/src/v/cce/bp_cce_dir_lru_extract.v +$BP_ME_DIR/src/v/cce/bp_cce_gad.v +$BP_ME_DIR/src/v/cce/bp_cce_inst_decode.v +$BP_ME_DIR/src/v/cce/bp_cce_msg.v +$BP_ME_DIR/src/v/cce/bp_cce_msg_cached.v +$BP_ME_DIR/src/v/cce/bp_cce_msg_uncached.v +$BP_ME_DIR/src/v/cce/bp_cce_pc.v +$BP_ME_DIR/src/v/cce/bp_cce_pending.v +$BP_ME_DIR/src/v/cce/bp_cce_reg.v +$BP_ME_DIR/src/v/cce/bp_cce_spec.v +$BP_ME_DIR/src/v/cce/bp_io_cce.v +$BP_ME_DIR/src/v/cce/bp_uce.v +$BP_ME_DIR/src/v/wormhole/bp_me_addr_to_cce_id.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_id_to_cord.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_bidir.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_client.v +$BP_ME_DIR/src/v/wormhole/bp_me_cce_to_mem_link_master.v +$BP_ME_DIR/src/v/wormhole/bp_me_cord_to_id.v +$BP_ME_DIR/src/v/wormhole/bp_me_lce_id_to_cord.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_cmd.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_req.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_lce_resp.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_mem_cmd.v +$BP_ME_DIR/src/v/wormhole/bp_me_wormhole_packet_encode_mem_resp.v +//$BP_TOP_DIR/src/v/bp_accelerator_complex.v +$BP_TOP_DIR/src/v/bp_cfg.v +$BP_TOP_DIR/src/v/bp_cfg_buffered.v +$BP_TOP_DIR/src/v/bp_core.v +//$BP_TOP_DIR/src/v/bp_core_complex.v +$BP_TOP_DIR/src/v/bp_core_minimal.v +//$BP_TOP_DIR/src/v/bp_clint.v +$BP_TOP_DIR/src/v/bp_clint_node.v +$BP_TOP_DIR/src/v/bp_clint_slice.v +$BP_TOP_DIR/src/v/bp_clint_slice_buffered.v +//$BP_TOP_DIR/src/v/bp_l2e_tile.v +//$BP_TOP_DIR/src/v/bp_l2e_tile_node.v +$BP_TOP_DIR/src/v/bp_io_complex.v +$BP_TOP_DIR/src/v/bp_io_link_to_lce.v +$BP_TOP_DIR/src/v/bp_io_tile.v +$BP_TOP_DIR/src/v/bp_io_tile_node.v +$BP_TOP_DIR/src/v/bp_mem_complex.v +//$BP_TOP_DIR/src/v/bp_processor.v +$BP_TOP_DIR/src/v/bp_softcore.v +//$BP_TOP_DIR/src/v/bp_tile.v +//$BP_TOP_DIR/src/v/bp_tile_node.v +$BP_TOP_DIR/src/v/bsg_async_noc_link.v +//$BASEJUMP_STL_DIR/bsg_test/bsg_nonsynth_reset_gen.v +//$BASEJUMP_STL_DIR/bsg_test/bsg_nonsynth_clock_gen.v +//$BASEJUMP_STL_DIR/bsg_fsb/bsg_fsb_node_trace_replay.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_calc_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_dcache_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_perf.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_npc_tracer.v +//$BP_BE_DIR/test/common/bp_be_nonsynth_vm_tracer.v +//$BP_ME_DIR/test/common/bp_mem.v +//$BP_ME_DIR/test/common/bp_mem_transducer.v +//$BP_ME_DIR/test/common/bp_mem_delay_model.v +//$BP_ME_DIR/test/common/bp_mem_storage_sync.v +//$BP_ME_DIR/test/common/bp_cce_mmio_cfg_loader.v +//$BP_ME_DIR/test/common/dramsim2_wrapper.cpp +//$BP_ME_DIR/test/common/bp_mem_utils.cpp +//$BP_ME_DIR/test/common/bp_cce_nonsynth_tracer.v +$BP_ME_DIR/test/common/bp_mem_nonsynth_tracer.v +//$BP_TOP_DIR/test/common/bp_nonsynth_cosim.v +//$BP_TOP_DIR/test/common/bp_nonsynth_host.v +//$BP_TOP_DIR/test/common/bp_nonsynth_if_verif.v +$BP_TOP_DIR/test/common/bp_nonsynth_commit_tracer.v +//$BP_TOP_DIR/test/common/bp_nonsynth_nbf_loader.v +//$BP_TOP_DIR/test/common/bp_monitor.cpp +//$BP_TOP_DIR/test/common/dromajo_cosim.cpp +//$BP_FPGA_DIR/wrapper.v +$BP_FPGA_DIR/bp2wb_convertor.v +$BP_FPGA_DIR/simulation/ExampleBlackParrotSystem.v -- 2.30.2