From 3f2e122d6120c6c85e2f070e23773e9c47d91c77 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 8 Jul 2022 20:05:43 +0100 Subject: [PATCH] --- openpower/atomics.mdwn | 64 ++++++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 31 deletions(-) diff --git a/openpower/atomics.mdwn b/openpower/atomics.mdwn index 9a8f62445..127e91e3b 100644 --- a/openpower/atomics.mdwn +++ b/openpower/atomics.mdwn @@ -111,37 +111,6 @@ unnecessary restrictions: it has only 32-bit and 64-bit atomic operations. -read operations v3.1 book II section 4.5.1 p1071 - - | 00000 | RT, RT+1 | mem(EA,s) | Fetch and Add | - | 00001 | RT, RT+1 | mem(EA,s) | Fetch and XOR | - | 00010 | RT, RT+1 | mem(EA,s) | Fetch and OR | - | 00011 | RT, RT+1 | mem(EA,s) | Fetch and AND | - | 00100 | RT, RT+1 | mem(EA,s) | Fetch and Maximum Unsigned | - | 00101 | RT, RT+1 | mem(EA,s) | Fetch and Maximum Signed | - | 00110 | RT, RT+1 | mem(EA,s) | Fetch and Minimum Unsigned | - | 00111 | RT, RT+1 | mem(EA,s) | Fetch and Minimum Signed | - | 01000 | RT, RT+1 | mem(EA,s) | Swap | - | 10000 | RT, RT+1, RT+2 | mem(EA,s) | Compare and Swap Not Equal | - | 11000 | RT | mem(EA,s) mem(EA+s, s) | Fetch and Increment Bounded | - | 11001 | RT | mem(EA,s) mem(EA+s, s) | Fetch and Increment Equal | - | 11100 | RT | mem(EA-s,s) mem(EA, s) | Fetch and Decrement Bounded | - -store operations - - | 00000 RS mem(EA,s) Store Add - | 00001 RS mem(EA,s) Store XOR - | 00010 RS mem(EA,s) Store OR - | 00011 RS mem(EA,s) Store AND t - | 00100 RS mem(EA,s) Store Maximum Unsigned - | 00101 RS mem(EA,s) Store Maximum Signed t - | 00110 RS mem(EA,s) Store Minimum Unsigned - | 00111 RS mem(EA,s) Store Minimum Signed - | 11000 RS mem(EA,s) Store Twin - -These operations are recognised as being part of the -OpenCAPI Specification. - see [[discussion]] for proposed operations and thoughts TODO remove this sentence @@ -170,3 +139,36 @@ AT-Form (TODO) sequentially consistent, meaning that it cannot be reordered with earlier or later atomic memory operations. +* `FC` is identical to the Function tables used in Power ISA v3 for `lwat` + and `stwat` + +read operations v3.1 book II section 4.5.1 p1071 + + | 00000 | RT, RT+1 | mem(EA,s) | Fetch and Add | + | 00001 | RT, RT+1 | mem(EA,s) | Fetch and XOR | + | 00010 | RT, RT+1 | mem(EA,s) | Fetch and OR | + | 00011 | RT, RT+1 | mem(EA,s) | Fetch and AND | + | 00100 | RT, RT+1 | mem(EA,s) | Fetch and Maximum Unsigned | + | 00101 | RT, RT+1 | mem(EA,s) | Fetch and Maximum Signed | + | 00110 | RT, RT+1 | mem(EA,s) | Fetch and Minimum Unsigned | + | 00111 | RT, RT+1 | mem(EA,s) | Fetch and Minimum Signed | + | 01000 | RT, RT+1 | mem(EA,s) | Swap | + | 10000 | RT, RT+1, RT+2 | mem(EA,s) | Compare and Swap Not Equal | + | 11000 | RT | mem(EA,s) mem(EA+s, s) | Fetch and Increment Bounded | + | 11001 | RT | mem(EA,s) mem(EA+s, s) | Fetch and Increment Equal | + | 11100 | RT | mem(EA-s,s) mem(EA, s) | Fetch and Decrement Bounded | + +store operations + + | 00000 RS mem(EA,s) Store Add + | 00001 RS mem(EA,s) Store XOR + | 00010 RS mem(EA,s) Store OR + | 00011 RS mem(EA,s) Store AND + | 00100 RS mem(EA,s) Store Maximum Unsigned + | 00101 RS mem(EA,s) Store Maximum Signed + | 00110 RS mem(EA,s) Store Minimum Unsigned + | 00111 RS mem(EA,s) Store Minimum Signed + | 11000 RS mem(EA,s) Store Twin + +These operations are recognised as being part of the +OpenCAPI Specification. -- 2.30.2