From 3f3652beac2bdaeeb178a0215a935d48cda3fe0b Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 8 Apr 2023 13:43:23 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls012.mdwn | 3 +++ 1 file changed, 3 insertions(+) diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn index 6d620a66e..30117caa8 100644 --- a/openpower/sv/rfc/ls012.mdwn +++ b/openpower/sv/rfc/ls012.mdwn @@ -226,6 +226,9 @@ plethora of innovative bit-permuting instructions never seen in any other ISA. The downside of all of these instructions is the extremely low XO bit requirements: 2-3 bit XO due to the large immediates *and* the number of operands required. The LUT3 instructions are already compacted down to "Overwrite" variants. +(By contrast the Float-Load-Immediate instructions are a much larger XO because +despite having 16-bit immediate only one Register Operand is needed). + Realistically these high-value instructions should be proposed in EXT2xx where their XO cost does not overwhelm EXT0xx. -- 2.30.2