From 3f74cb9f13dc3ec157e52eb3166a82b23a00e0e8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Fri, 28 Jun 2019 20:25:02 +0100 Subject: [PATCH] --- simple_v_extension/vblock_format_table.mdwn | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/simple_v_extension/vblock_format_table.mdwn b/simple_v_extension/vblock_format_table.mdwn index 04eb54e77..cbc577d15 100644 --- a/simple_v_extension/vblock_format_table.mdwn +++ b/simple_v_extension/vblock_format_table.mdwn @@ -13,8 +13,10 @@ of the RISC-V ISA, is as follows: The VL/MAXVL/SubVL Block format: -| 31-30 | 29:28 | 27:22 | 21:17 - 16 | -| - | ----- | ------ | ------ - - | -| 0 | SubVL | VLdest | VLEN vlt | -| 1 | SubVL | VLdest | VLEN | +| 31-30 | 29:28 | 27:22 | 21:17 | 16 | comment | +| - | ----- | ------ | ------ | - | -| +| 0 | SubVL | VLdest | VLimm | 0 | | +| 0 | SubVL | MVLimm | VLreg | 1 | VLdest=t0 | +| 1 | SubVL | VLdest | VLimm | imm | VL & MVL, bits 16-21 | + -- 2.30.2