From 3f86cbea49b6c9a07a27f029922b647d337eba49 Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 19 May 2020 15:23:50 +0100 Subject: [PATCH] --- 3d_gpu/architecture/tomasulo_transformation.mdwn | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/3d_gpu/architecture/tomasulo_transformation.mdwn b/3d_gpu/architecture/tomasulo_transformation.mdwn index 430a7d10a..e600bdcfe 100644 --- a/3d_gpu/architecture/tomasulo_transformation.mdwn +++ b/3d_gpu/architecture/tomasulo_transformation.mdwn @@ -1,6 +1,8 @@ # Conversion from Tomasulo to Scoreboards -See [discussion](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006747.html). +See [discussion (1)](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006747.html) and +[discussion (2)](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-May/006904.html) + This page aids and assists in understanding the full functional equivalence of a Scoreboard-based design when compared to a Tomasulo algorithm. However it is extremely important to note that the Academic literature, by focussing @@ -37,8 +39,7 @@ yes. it comes down to time. start with this. -1. Begin from Tomasulo. neither TS nor original 6600 have precise - exceptions so we leave that out for now. +1. Begin from Tomasulo. 2. Make sure to add an Operand Forwarding Bus. this is critical to providing the functionality provided by the Tomasulo Common Data Bus. @@ -81,6 +82,13 @@ start with this. ROB, setting multiple bits *even for single-issue* (5-bits for 32-bit reg numbering). +10. add "Shadowing" capability to each Function Unit + and create a Shadow Matrix (appx 20 gates per Function Unit) + + the "Shadow" capability hooks into the WRITE-COMMIT phase of every + Function Unit, permitting it to EXECUTE but prohibiting it from WRITING + the result of that execution until explicitly permitted to do so. + with the ROB now having rows of bitvectors, it is now termed a "Matrix". the left side of the ROB, which used to contain the RS Number in unary, -- 2.30.2