From 3fca02cde23886c4177b5e48f00aefd066c420f1 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 26 Oct 2020 17:28:34 +0000 Subject: [PATCH] --- openpower/sv/predication.mdwn | 2 ++ 1 file changed, 2 insertions(+) diff --git a/openpower/sv/predication.mdwn b/openpower/sv/predication.mdwn index 1c0c80ce3..1ed1f5642 100644 --- a/openpower/sv/predication.mdwn +++ b/openpower/sv/predication.mdwn @@ -142,6 +142,8 @@ On balance this is a less favourable option than vectorising CRs ## Scalar (single) integer as predicate, with one DM row +This idea has merit in that to perform predicate bitmanip operations the preficate is already in scalar INT reg form and consequently standard scalar INT bitmanip operations can be done straight away. Vectorised mfcr can be used to get CMP results or Vectorised Rc=1 CRs into the scalar INT, easily. + This idea has several disadvantages. * the single DM entry for the entire 64 bits creates a read hazard -- 2.30.2