From 3fea9481776bae953f718a8630a975e027f1bc5f Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Thu, 12 Mar 2020 14:20:05 +0100 Subject: [PATCH] radv: cleanup occurences of use_aco everywhere Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_pipeline.c | 17 +++++++---------- src/amd/vulkan/radv_shader.c | 34 ++++++++++++++++++---------------- src/amd/vulkan/radv_shader.h | 7 ++----- 3 files changed, 27 insertions(+), 31 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 7f32e135c63..f87333aefa5 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -2789,8 +2789,6 @@ void radv_create_shaders(struct radv_pipeline *pipeline, modules[MESA_SHADER_FRAGMENT] = &fs_m; } - bool use_aco = device->physical_device->use_aco; - for (unsigned i = 0; i < MESA_SHADER_STAGES; ++i) { const VkPipelineShaderStageCreateInfo *stage = pStages[i]; @@ -2802,7 +2800,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, nir[i] = radv_shader_compile_to_nir(device, modules[i], stage ? stage->pName : "main", i, stage ? stage->pSpecializationInfo : NULL, - flags, pipeline->layout, use_aco); + flags, pipeline->layout); /* We don't want to alter meta shaders IR directly so clone it * first. @@ -2824,7 +2822,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, for (int i = 0; i < MESA_SHADER_STAGES; ++i) { if (nir[i]) { - if (use_aco) { + if (device->physical_device->use_aco) { NIR_PASS_V(nir[i], nir_lower_non_uniform_access, nir_lower_non_uniform_ubo_access | nir_lower_non_uniform_ssbo_access | @@ -2886,8 +2884,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->gs_copy_shader = radv_create_gs_copy_shader( device, nir[MESA_SHADER_GEOMETRY], &info, &gs_copy_binary, keep_executable_info, - keys[MESA_SHADER_GEOMETRY].has_multiview_view_index, - use_aco); + keys[MESA_SHADER_GEOMETRY].has_multiview_view_index); } if (!keep_executable_info && pipeline->gs_copy_shader) { @@ -2913,7 +2910,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, radv_shader_variant_compile(device, modules[MESA_SHADER_FRAGMENT], &nir[MESA_SHADER_FRAGMENT], 1, pipeline->layout, keys + MESA_SHADER_FRAGMENT, infos + MESA_SHADER_FRAGMENT, - keep_executable_info, use_aco, + keep_executable_info, &binaries[MESA_SHADER_FRAGMENT]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_FRAGMENT], false); @@ -2931,7 +2928,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_TESS_CTRL] = radv_shader_variant_compile(device, modules[MESA_SHADER_TESS_CTRL], combined_nir, 2, pipeline->layout, &key, &infos[MESA_SHADER_TESS_CTRL], keep_executable_info, - use_aco, &binaries[MESA_SHADER_TESS_CTRL]); + &binaries[MESA_SHADER_TESS_CTRL]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_TESS_CTRL], false); } @@ -2950,7 +2947,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[MESA_SHADER_GEOMETRY] = radv_shader_variant_compile(device, modules[MESA_SHADER_GEOMETRY], combined_nir, 2, pipeline->layout, &keys[pre_stage], &infos[MESA_SHADER_GEOMETRY], keep_executable_info, - use_aco, &binaries[MESA_SHADER_GEOMETRY]); + &binaries[MESA_SHADER_GEOMETRY]); radv_stop_feedback(stage_feedbacks[MESA_SHADER_GEOMETRY], false); } @@ -2972,7 +2969,7 @@ void radv_create_shaders(struct radv_pipeline *pipeline, pipeline->shaders[i] = radv_shader_variant_compile(device, modules[i], &nir[i], 1, pipeline->layout, keys + i, infos + i,keep_executable_info, - use_aco, &binaries[i]); + &binaries[i]); radv_stop_feedback(stage_feedbacks[i], false); } diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 049611371f6..0feb9764b8a 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -296,12 +296,13 @@ radv_shader_compile_to_nir(struct radv_device *device, gl_shader_stage stage, const VkSpecializationInfo *spec_info, const VkPipelineCreateFlags flags, - const struct radv_pipeline_layout *layout, - bool use_aco) + const struct radv_pipeline_layout *layout) { nir_shader *nir; - const nir_shader_compiler_options *nir_options = use_aco ? &nir_options_aco : - &nir_options_llvm; + const nir_shader_compiler_options *nir_options = + device->physical_device->use_aco ? &nir_options_aco : + &nir_options_llvm; + if (module->nir) { /* Some things such as our meta clear/blit code will give us a NIR * shader directly. In that case, we just ignore the SPIR-V entirely @@ -432,7 +433,8 @@ radv_shader_compile_to_nir(struct radv_device *device, NIR_PASS_V(nir, nir_split_var_copies); NIR_PASS_V(nir, nir_split_per_member_structs); - if (nir->info.stage == MESA_SHADER_FRAGMENT && use_aco) + if (nir->info.stage == MESA_SHADER_FRAGMENT && + device->physical_device->use_aco) NIR_PASS_V(nir, nir_lower_io_to_vector, nir_var_shader_out); if (nir->info.stage == MESA_SHADER_FRAGMENT) NIR_PASS_V(nir, nir_lower_input_attachments, true); @@ -454,7 +456,8 @@ radv_shader_compile_to_nir(struct radv_device *device, nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir)); - if (nir->info.stage == MESA_SHADER_GEOMETRY && use_aco) + if (nir->info.stage == MESA_SHADER_GEOMETRY && + device->physical_device->use_aco) nir_lower_gs_intrinsics(nir, true); static const nir_lower_tex_options tex_options = { @@ -1086,7 +1089,6 @@ shader_variant_compile(struct radv_device *device, struct radv_nir_compiler_options *options, bool gs_copy_shader, bool keep_shader_info, - bool use_aco, struct radv_shader_binary **binary_out) { enum radeon_family chip_family = device->physical_device->rad_info.family; @@ -1115,10 +1117,11 @@ shader_variant_compile(struct radv_device *device, shader_count >= 2 ? shaders[shader_count - 2]->info.stage : MESA_SHADER_VERTEX); - if (!use_aco || options->dump_shader || options->record_ir) + if (!device->physical_device->use_aco || + options->dump_shader || options->record_ir) ac_init_llvm_once(); - if (use_aco) { + if (device->physical_device->use_aco) { aco_compile_shader(shader_count, shaders, &binary, &args); binary->info = *info; } else { @@ -1157,7 +1160,7 @@ shader_variant_compile(struct radv_device *device, free(binary); return NULL; } - variant->aco_used = use_aco; + variant->aco_used = device->physical_device->use_aco; if (options->dump_shader) { fprintf(stderr, "disasm:\n%s\n", variant->disasm_string); @@ -1196,7 +1199,6 @@ radv_shader_variant_compile(struct radv_device *device, const struct radv_shader_variant_key *key, struct radv_shader_info *info, bool keep_shader_info, - bool use_aco, struct radv_shader_binary **binary_out) { struct radv_nir_compiler_options options = {0}; @@ -1205,11 +1207,11 @@ radv_shader_variant_compile(struct radv_device *device, if (key) options.key = *key; - options.explicit_scratch_args = use_aco; + options.explicit_scratch_args = device->physical_device->use_aco; options.robust_buffer_access = device->robust_buffer_access; return shader_variant_compile(device, module, shaders, shader_count, shaders[shader_count - 1]->info.stage, info, - &options, false, keep_shader_info, use_aco, binary_out); + &options, false, keep_shader_info, binary_out); } struct radv_shader_variant * @@ -1218,15 +1220,15 @@ radv_create_gs_copy_shader(struct radv_device *device, struct radv_shader_info *info, struct radv_shader_binary **binary_out, bool keep_shader_info, - bool multiview, bool use_aco) + bool multiview) { struct radv_nir_compiler_options options = {0}; - options.explicit_scratch_args = use_aco; + options.explicit_scratch_args = device->physical_device->use_aco; options.key.has_multiview_view_index = multiview; return shader_variant_compile(device, NULL, &shader, 1, MESA_SHADER_VERTEX, - info, &options, true, keep_shader_info, use_aco, binary_out); + info, &options, true, keep_shader_info, binary_out); } void diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index 30445353e7c..f08742f9cd5 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -404,8 +404,7 @@ radv_shader_compile_to_nir(struct radv_device *device, gl_shader_stage stage, const VkSpecializationInfo *spec_info, const VkPipelineCreateFlags flags, - const struct radv_pipeline_layout *layout, - bool use_aco); + const struct radv_pipeline_layout *layout); void * radv_alloc_shader_memory(struct radv_device *device, @@ -437,15 +436,13 @@ radv_shader_variant_compile(struct radv_device *device, const struct radv_shader_variant_key *key, struct radv_shader_info *info, bool keep_shader_info, - bool use_aco, struct radv_shader_binary **binary_out); struct radv_shader_variant * radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir, struct radv_shader_info *info, struct radv_shader_binary **binary_out, - bool multiview, bool keep_shader_info, - bool use_aco); + bool multiview, bool keep_shader_info); void radv_shader_variant_destroy(struct radv_device *device, -- 2.30.2