From 3fffdd0efaedd8fbca1242b28b9910574486a74c Mon Sep 17 00:00:00 2001 From: Jean THOMAS Date: Fri, 3 Jul 2020 14:32:10 +0200 Subject: [PATCH] Update gram simulation documentation --- gram/simulation/README.md | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/gram/simulation/README.md b/gram/simulation/README.md index 8392d0a..4d15f57 100644 --- a/gram/simulation/README.md +++ b/gram/simulation/README.md @@ -4,15 +4,27 @@ This folder contains code used for low level simulation of various aspects of gr ## Requirements - * Icarus Verilog (preferably a recent version) + * Icarus Verilog (built from latest sources) * ECP5 instances models from a Lattice Diamond installation (just install Lattice Diamond) ## Available simulations ### simcrg +Simulates the CRG used in ECPIX5 gram tests and checks for a few assertions. + ``` ./runsimcrg.sh ``` -Produces `simcrg.vcd`. +Produces `simcrg.fst` (compatbile with Gtkwave). + +### simsoc + +Simulates a full SoC with a UART Wishbone master and a DDR3 model, and sends the init commands that libgram would send over serial. + +``` +./runsimsoc.sh +``` + +Produces `simsoc.fst` (compatible with Gtkwave). -- 2.30.2