From 40293143690940708d91c1ee1ab2ed9f06ea897c Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 11 Jun 2022 17:33:01 +0100 Subject: [PATCH] --- openpower/sv/mv.swizzle.mdwn | 30 ++++++++++++++++++------------ 1 file changed, 18 insertions(+), 12 deletions(-) diff --git a/openpower/sv/mv.swizzle.mdwn b/openpower/sv/mv.swizzle.mdwn index adc9d1ae9..8c0b84cad 100644 --- a/openpower/sv/mv.swizzle.mdwn +++ b/openpower/sv/mv.swizzle.mdwn @@ -29,33 +29,39 @@ registers: | swizzle name | source | dest | half | |-- | -- | -- | -- | -| X | RA | RT | lo-half | -| Y | RA | RT | hi-half | -| Z | RA+1 | RT+1 | lo-half | -| W | RA+1 | RT+1 | hi-half | +| X | RS | RT | lo-half | +| Y | RS | RT | hi-half | +| Z | RS+1 | RT+1 | lo-half | +| W | RS+1 | RT+1 | hi-half | -When RA=RT (in-place swizzle) any portion of RT not covered by +When RS=RT (in-place swizzle) any portion of RT not covered by the Swizzle is unmodified. For example a Swizzle of "..XY" -will copy the contents RA+1 into RT but leave RT+1 unmodified. +will copy the contents RS+1 into RT but leave RT+1 unmodified. -When RA!=RT any part of RT or RT+1 not set as a destination by +When RS!=RT any part of RT or RT+1 not set as a destination by the Swizzle will be set to zero. A Swizzle of "..XY" would -copy the contents RA+1 into RT, but set RT+1 to zero. +copy the contents RS+1 into RT, but set RT+1 to zero. Also, making life easier, RT and RA are only permitted to be even -(no overlapping can occur). This makes RT (and RA) a "pair" exactly +(no overlapping can occur). This makes RT (and RS) a "pair" exactly like `lq` and `stq` **SVP64 Vectorised** -When Vectorised, the +When Vectorised, given the use-case is for a High-performance GPU, +the fundamental assumption is that Micro-coding or +other technique will +be deployed in hardware to issue multiple Scalar MV operations which +would be impractical in a smaller Scalar-only Micro-architecture. +Therefore the restriction imposed on the Scalar `mv.swiz` to 32-bit +quantities as the default is lifted on `sv.mv.swiz`. # Format | 0.5 |6.10|11.15|16.27|28.31| name | |-----|----|-----|-----|-----|--------------| -|PO | RTp| RAp |imm | 0011| mv.swiz | -|PO | RTp| RAp |imm | 1011| fmv.swiz | +|PO | RTp| RSp |imm | 0011| mv.swiz | +|PO | RTp| RSp |imm | 1011| fmv.swiz | this gives a 12 bit immediate across bits 16 to 25 and 29-30. -- 2.30.2