From 405c5495313248c057a9d6df722134f49672a086 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Mon, 20 Dec 1993 19:09:40 -0500 Subject: [PATCH] (divsi3): Correct logic for when we call force_reg. (modsi3): Ensure operands[2] is a CONST_INT; include REG in predicate. From-SVN: r6248 --- gcc/config/rs6000/rs6000.md | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index bd8fc6b214e..72957aec5a8 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -754,17 +754,16 @@ if (GET_CODE (operands[2]) == CONST_INT && exact_log2 (INTVAL (operands[2])) >= 0) ; - else if (! TARGET_POWERPC) FAIL; - - operands[2] = force_reg (SImode, operands[2]); + else + operands[2] = force_reg (SImode, operands[2]); }") (define_expand "modsi3" [(use (match_operand:SI 0 "gpc_reg_operand" "")) (use (match_operand:SI 1 "gpc_reg_operand" "")) - (use (match_operand:SI 2 "const_int_operand" ""))] + (use (match_operand:SI 2 "reg_or_cint_operand" ""))] "" " { @@ -772,7 +771,7 @@ rtx temp1; rtx temp2; - if (i < 0) + if (GET_CODE (operands[2]) != CONST_INT || i < 0) FAIL; temp1 = gen_reg_rtx (SImode); -- 2.30.2