From 4070208f2384df01798d23e6ecba7b30296aa588 Mon Sep 17 00:00:00 2001 From: Kewen Lin Date: Wed, 8 Jul 2020 02:44:02 -0500 Subject: [PATCH] rs6000: Add len_load/len_store optab support Define rs6000 specific len_load/len_store for the LEN_LOAD/LEN_STORE internal function's expansion. As the doc description of the len_load/len_store optab shows, we should use V16QI to wrap those available vector modes. gcc/ChangeLog: * config/rs6000/vsx.md (len_load_v16qi): New define_expand. (len_store_v16qi): Likewise. --- gcc/config/rs6000/vsx.md | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 732a54842b6..42a31a60b0e 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -5100,6 +5100,34 @@ operands[3] = gen_reg_rtx (DImode); }) +;; Define optab for vector access with length vectorization exploitation. +(define_expand "len_load_v16qi" + [(match_operand:V16QI 0 "vlogical_operand") + (match_operand:V16QI 1 "memory_operand") + (match_operand:QI 2 "gpc_reg_operand")] + "TARGET_P9_VECTOR && TARGET_64BIT" +{ + rtx mem = XEXP (operands[1], 0); + mem = force_reg (DImode, mem); + rtx len = gen_lowpart (DImode, operands[2]); + emit_insn (gen_lxvl (operands[0], mem, len)); + DONE; +}) + +(define_expand "len_store_v16qi" + [(match_operand:V16QI 0 "memory_operand") + (match_operand:V16QI 1 "vlogical_operand") + (match_operand:QI 2 "gpc_reg_operand") + ] + "TARGET_P9_VECTOR && TARGET_64BIT" +{ + rtx mem = XEXP (operands[0], 0); + mem = force_reg (DImode, mem); + rtx len = gen_lowpart (DImode, operands[2]); + emit_insn (gen_stxvl (operands[1], mem, len)); + DONE; +}) + (define_insn "*stxvl" [(set (mem:V16QI (match_operand:DI 1 "gpc_reg_operand" "b")) (unspec:V16QI -- 2.30.2