From 4095f9fa677f86c2471eb841c45a228ed2297888 Mon Sep 17 00:00:00 2001
From: "Naveen H.S" <Naveen.Hurugalawadi@caviumnetworks.com>
Date: Tue, 7 May 2013 12:20:24 +0000
Subject: [PATCH] AArch64: Restrict the shift value in compare extended shift
 operation

2013-05-07  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>

	* config/aarch64/aarch64.md
	(cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the
	shift value between 0-4.

From-SVN: r198677
---
 gcc/ChangeLog                 | 6 ++++++
 gcc/config/aarch64/aarch64.md | 2 +-
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0dc66003fb4..44a600898bc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2013-05-07  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
+
+	* config/aarch64/aarch64.md
+	(cmp_swp_<optab><ALLX:mode>_shft_<GPI:mode>): Restrict the
+	shift value between 0-4.
+
 2013-05-07  Richard Biener  <rguenther@suse.de>
 
 	* double-int.h (rshift): New overload.
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 365bb23d33f..797cc9b02cc 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -2349,7 +2349,7 @@
 	(compare:CC_SWP (ashift:GPI
 			 (ANY_EXTEND:GPI
 			  (match_operand:ALLX 0 "register_operand" "r"))
-			 (match_operand:QI 1 "aarch64_shift_imm_<mode>" "n"))
+			 (match_operand 1 "aarch64_imm3" "Ui3"))
 	(match_operand:GPI 2 "register_operand" "r")))]
   ""
   "cmp\\t%<GPI:w>2, %<GPI:w>0, <su>xt<ALLX:size> %1"
-- 
2.30.2