From 40ee64929a20930af7b7c2552ffb9e75c54d2986 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 2 May 2022 20:53:32 +0100 Subject: [PATCH] --- openpower/sv/svp64/appendix.mdwn | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index 57eeef791..1faad4e0d 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -45,8 +45,8 @@ that: that the prefixed instruction is executed then it is executed in hardware as per specification, with no illegal exception trap raised. -Example, assuming that hardware implements predication but not -elwidth overrides: +Example, assuming that hardware implements scalar operations only, +and implements predication but not elwidth overrides: setvli r0, 4 # sets VL equal to 4 sv.addi r5, r0, 1 # raises an 0x700 trap @@ -55,7 +55,10 @@ elwidth overrides: sv.addi/ew=8 r5, r0, 1 # raises an 0x700 trap sv.ori/sm=EQ r5, r0, 1 # executed by hardware -The first +The first `sv.addi` raises an illegal instruction trap because +VL has been set to 4, and this is not supported. Likewise +elwidth overrides if requested always raise illegal instruction +traps. # XER, SO and other global flags -- 2.30.2