From 415073ea1ada74f098c6e8debed433a2ff2a05ce Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Mon, 26 Oct 2020 17:29:54 +0000
Subject: [PATCH]

---
 openpower/sv/predication.mdwn | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/openpower/sv/predication.mdwn b/openpower/sv/predication.mdwn
index 1ed1f5642..a6b27694b 100644
--- a/openpower/sv/predication.mdwn
+++ b/openpower/sv/predication.mdwn
@@ -186,7 +186,8 @@ and ongoing maintenance difficulties.
 ## Schemes which split (a scalar) integer reg into mask "chunks"
 
 These ideas are based on the principle that each chunk of 8 (or 16)
-bits of a scalar integer register may be covered by its own DM row.
+bits of a scalar integer register may be covered by its own DM column
+  in FU-REGs.
 8 chunks of a scalar 64-bit integer register for use as a bit-level
 predicate mask onto 64 vector elements would for example require 8
 DM entries.
-- 
2.30.2