From 41a4ef2243b0128f6f35b3da8f7d18a609a923ea Mon Sep 17 00:00:00 2001 From: Kirill Yukhin Date: Thu, 24 Dec 2015 11:05:34 +0000 Subject: [PATCH] Introduce support for PKU instructions. gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_PKU_SET): New. (OPTION_MASK_ISA_PKU_UNSET): Ditto. (ix86_handle_option): Handle OPT_mpku. * config.gcc: Add pkuintrin.h to i[34567]86-*-* and x86_64-*-* targets. * config/i386/cpuid.h (host_detect_local_cpu): Detect PKU feature. * config/i386/i386-c.c (ix86_target_macros_internal): Handle PKU ISA flag. * config/i386/i386.c (ix86_target_string): Add "-mpku" to ix86_target_opts. (ix86_option_override_internal): Define PTA_PKU, mention new key in skylake-avx512. Handle new ISA bits. (ix86_valid_target_attribute_inner_p): Add "pku". (enum ix86_builtins): Add IX86_BUILTIN_RDPKRU and IX86_BUILTIN_WRPKRU. (builtin_description bdesc_special_args[]): Add new built-ins. * config/i386/i386.h (define TARGET_PKU): New. (define TARGET_PKU_P): Ditto. * config/i386/i386.md (define_c_enum "unspecv"): Add UNSPEC_PKU. (define_expand "rdpkru"): New. (define_insn "*rdpkru"): Ditto. (define_expand "wrpkru"): Ditto. (define_insn "*wrpkru"): Ditto. * config/i386/i386.opt (mpku): Ditto. * config/i386/pkuintrin.h: New file. * config/i386/x86intrin.h: Include pkuintrin.h * doc/extend.texi: Describe new built-ins. * doc/invoke.texi: Describe new switches. gcc/testsuite/ * g++.dg/other/i386-2.C: Add -mpku. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/rdpku-1.c: New test. * gcc.target/i386/sse-12.c: Add -mpku. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-33.c: Ditto. * gcc.target/i386/wrpku-1.c: New test. From-SVN: r231944 --- gcc/ChangeLog | 30 +++++++++++++++++ gcc/common/config/i386/i386-common.c | 15 +++++++++ gcc/config.gcc | 6 ++-- gcc/config/i386/cpuid.h | 2 ++ gcc/config/i386/driver-i386.c | 8 +++-- gcc/config/i386/i386-c.c | 2 ++ gcc/config/i386/i386.c | 16 ++++++++- gcc/config/i386/i386.h | 3 ++ gcc/config/i386/i386.md | 44 +++++++++++++++++++++++++ gcc/config/i386/i386.opt | 4 +++ gcc/config/i386/x86intrin.h | 2 ++ gcc/doc/extend.texi | 7 ++++ gcc/doc/invoke.texi | 9 +++-- gcc/testsuite/ChangeLog | 11 +++++++ gcc/testsuite/g++.dg/other/i386-2.C | 4 +-- gcc/testsuite/g++.dg/other/i386-3.C | 4 +-- gcc/testsuite/gcc.target/i386/rdpku-1.c | 11 +++++++ gcc/testsuite/gcc.target/i386/sse-12.c | 2 +- gcc/testsuite/gcc.target/i386/sse-13.c | 2 +- gcc/testsuite/gcc.target/i386/sse-22.c | 2 +- gcc/testsuite/gcc.target/i386/sse-23.c | 2 +- gcc/testsuite/gcc.target/i386/wrpku-1.c | 11 +++++++ 22 files changed, 180 insertions(+), 17 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/rdpku-1.c create mode 100644 gcc/testsuite/gcc.target/i386/wrpku-1.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6bc47d56f75..e7758fbf000 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,33 @@ +2015-12-24 Kirill Yukhin + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_PKU_SET): New. + (OPTION_MASK_ISA_PKU_UNSET): Ditto. + (ix86_handle_option): Handle OPT_mpku. + * config.gcc: Add pkuintrin.h to i[34567]86-*-* and x86_64-*-* + targets. + * config/i386/cpuid.h (host_detect_local_cpu): Detect PKU feature. + * config/i386/i386-c.c (ix86_target_macros_internal): Handle PKU ISA + flag. + * config/i386/i386.c (ix86_target_string): Add "-mpku" to + ix86_target_opts. + (ix86_option_override_internal): Define PTA_PKU, mention new key + in skylake-avx512. Handle new ISA bits. + (ix86_valid_target_attribute_inner_p): Add "pku". + (enum ix86_builtins): Add IX86_BUILTIN_RDPKRU and IX86_BUILTIN_WRPKRU. + (builtin_description bdesc_special_args[]): Add new built-ins. + * config/i386/i386.h (define TARGET_PKU): New. + (define TARGET_PKU_P): Ditto. + * config/i386/i386.md (define_c_enum "unspecv"): Add UNSPEC_PKU. + (define_expand "rdpkru"): New. + (define_insn "*rdpkru"): Ditto. + (define_expand "wrpkru"): Ditto. + (define_insn "*wrpkru"): Ditto. + * config/i386/i386.opt (mpku): Ditto. + * config/i386/pkuintrin.h: New file. + * config/i386/x86intrin.h: Include pkuintrin.h + * doc/extend.texi: Describe new built-ins. + * doc/invoke.texi: Describe new switches. + 2015-12-23 Richard Henderson PR ipa/67811 diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index a9d2208bc49..6039e046ef3 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -129,6 +129,7 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_F16C | OPTION_MASK_ISA_AVX_SET) #define OPTION_MASK_ISA_MWAITX_SET OPTION_MASK_ISA_MWAITX #define OPTION_MASK_ISA_CLZERO_SET OPTION_MASK_ISA_CLZERO +#define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU /* Define a set of ISAs which aren't available when a given ISA is disabled. MMX and SSE ISAs are handled separately. */ @@ -190,6 +191,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_CLWB_UNSET OPTION_MASK_ISA_CLWB #define OPTION_MASK_ISA_MWAITX_UNSET OPTION_MASK_ISA_MWAITX #define OPTION_MASK_ISA_CLZERO_UNSET OPTION_MASK_ISA_CLZERO +#define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU /* SSE4 includes both SSE4.1 and SSE4.2. -mno-sse4 should the same as -mno-sse4.1. */ @@ -962,6 +964,19 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mpku: + if (value) + { + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_SET; + } + else + { + opts->x_ix86_isa_flags &= ~OPTION_MASK_ISA_PKU_UNSET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_PKU_UNSET; + } + return true; + /* Comes from final.c -- no real reason to change it. */ #define MAX_CODE_ALIGN 16 diff --git a/gcc/config.gcc b/gcc/config.gcc index 79908f477e1..2caf9f3b271 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -374,7 +374,8 @@ i[34567]86-*-*) xsavesintrin.h avx512dqintrin.h avx512bwintrin.h avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h - avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h mwaitxintrin.h clzerointrin.h" + avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h + mwaitxintrin.h clzerointrin.h pkuintrin.h" ;; x86_64-*-*) cpu_type=i386 @@ -395,7 +396,8 @@ x86_64-*-*) xsavesintrin.h avx512dqintrin.h avx512bwintrin.h avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h - avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h mwaitxintrin.h clzerointrin.h" + avx512vbmivlintrin.h clwbintrin.h pcommitintrin.h + mwaitxintrin.h clzerointrin.h pkuintrin.h" ;; ia64-*-*) extra_headers=ia64intrin.h diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index fccdf1f8782..05cdc80a18e 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -95,6 +95,8 @@ /* %ecx */ #define bit_PREFETCHWT1 (1 << 0) #define bit_AVX512VBMI (1 << 1) +#define bit_PKU (1 << 3) +#define bit_OSPKE (1 << 4) /* XFEATURE_ENABLED_MASK register bits (%eax == 13, %ecx == 0) */ #define bit_BNDREGS (1 << 3) diff --git a/gcc/config/i386/driver-i386.c b/gcc/config/i386/driver-i386.c index 8ec1e40c2ac..b91d38aa4a3 100644 --- a/gcc/config/i386/driver-i386.c +++ b/gcc/config/i386/driver-i386.c @@ -414,7 +414,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) unsigned int has_avx512dq = 0, has_avx512bw = 0, has_avx512vl = 0; unsigned int has_avx512vbmi = 0, has_avx512ifma = 0, has_clwb = 0; unsigned int has_pcommit = 0, has_mwaitx = 0; - unsigned int has_clzero = 0; + unsigned int has_clzero = 0, has_pku = 0; bool arch; @@ -501,7 +501,8 @@ const char *host_detect_local_cpu (int argc, const char **argv) has_avx512vl = ebx & bit_AVX512IFMA; has_prefetchwt1 = ecx & bit_PREFETCHWT1; - has_avx512vl = ecx & bit_AVX512VBMI; + has_avx512vbmi = ecx & bit_AVX512VBMI; + has_pku = ecx & bit_OSPKE; } if (max_level >= 13) @@ -971,6 +972,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) const char *pcommit = has_pcommit ? " -mpcommit" : " -mno-pcommit"; const char *mwaitx = has_mwaitx ? " -mmwaitx" : " -mno-mwaitx"; const char *clzero = has_clzero ? " -mclzero" : " -mno-clzero"; + const char *pku = has_pku ? " -mpku" : " -mno-pku"; options = concat (options, mmx, mmx3dnow, sse, sse2, sse3, ssse3, sse4a, cx16, sahf, movbe, aes, sha, pclmul, popcnt, abm, lwp, fma, fma4, xop, bmi, bmi2, @@ -980,7 +982,7 @@ const char *host_detect_local_cpu (int argc, const char **argv) avx512cd, avx512pf, prefetchwt1, clflushopt, xsavec, xsaves, avx512dq, avx512bw, avx512vl, avx512ifma, avx512vbmi, clwb, pcommit, mwaitx, - clzero, NULL); + clzero, pku, NULL); } done: diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index e3a301205e6..64001b10ec9 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -439,6 +439,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__CLWB__"); if (isa_flag & OPTION_MASK_ISA_MWAITX) def_or_undef (parse_in, "__MWAITX__"); + if (isa_flag & OPTION_MASK_ISA_PKU) + def_or_undef (parse_in, "__PKU__"); if (TARGET_IAMCU) { def_or_undef (parse_in, "__iamcu"); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f5d23d9b947..733d0ab6275 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3755,6 +3755,7 @@ ix86_target_string (HOST_WIDE_INT isa, int flags, const char *arch, { "-mpcommit", OPTION_MASK_ISA_PCOMMIT }, { "-mmwaitx", OPTION_MASK_ISA_MWAITX }, { "-mclzero", OPTION_MASK_ISA_CLZERO }, + { "-mpku", OPTION_MASK_ISA_PKU }, }; /* Flag options. */ @@ -4310,6 +4311,7 @@ ix86_option_override_internal (bool main_args_p, #define PTA_MWAITX (HOST_WIDE_INT_1 << 57) #define PTA_CLZERO (HOST_WIDE_INT_1 << 58) #define PTA_NO_80387 (HOST_WIDE_INT_1 << 59) +#define PTA_PKU (HOST_WIDE_INT_1 << 60) #define PTA_CORE2 \ (PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \ @@ -4331,7 +4333,7 @@ ix86_option_override_internal (bool main_args_p, (PTA_BROADWELL | PTA_CLFLUSHOPT | PTA_XSAVEC | PTA_XSAVES) #define PTA_SKYLAKE_AVX512 \ (PTA_SKYLAKE | PTA_AVX512F | PTA_AVX512CD | PTA_AVX512VL \ - | PTA_AVX512BW | PTA_AVX512DQ) + | PTA_AVX512BW | PTA_AVX512DQ | PTA_PKU) #define PTA_KNL \ (PTA_BROADWELL | PTA_AVX512PF | PTA_AVX512ER | PTA_AVX512F | PTA_AVX512CD) #define PTA_BONNELL \ @@ -4934,6 +4936,9 @@ ix86_option_override_internal (bool main_args_p, if (processor_alias_table[i].flags & PTA_MWAITX && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_MWAITX)) opts->x_ix86_isa_flags |= OPTION_MASK_ISA_MWAITX; + if (processor_alias_table[i].flags & PTA_PKU + && !(opts->x_ix86_isa_flags_explicit & OPTION_MASK_ISA_PKU)) + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_PKU; if (!(opts_set->x_target_flags & MASK_80387)) { @@ -5930,6 +5935,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[], IX86_ATTR_ISA ("pcommit", OPT_mpcommit), IX86_ATTR_ISA ("mwaitx", OPT_mmwaitx), IX86_ATTR_ISA ("clzero", OPT_mclzero), + IX86_ATTR_ISA ("pku", OPT_mpku), /* enum options */ IX86_ATTR_ENUM ("fpmath=", OPT_mfpmath_), @@ -32286,6 +32292,10 @@ enum ix86_builtins IX86_BUILTIN_READ_FLAGS, IX86_BUILTIN_WRITE_FLAGS, + /* PKU instructions. */ + IX86_BUILTIN_RDPKRU, + IX86_BUILTIN_WRPKRU, + IX86_BUILTIN_MAX }; @@ -32791,6 +32801,10 @@ static const struct builtin_description bdesc_special_args[] = /* PCOMMIT. */ { OPTION_MASK_ISA_PCOMMIT, CODE_FOR_pcommit, "__builtin_ia32_pcommit", IX86_BUILTIN_PCOMMIT, UNKNOWN, (int) VOID_FTYPE_VOID }, + + /* RDPKRU and WRPKRU. */ + { OPTION_MASK_ISA_PKU, CODE_FOR_rdpkru, "__builtin_ia32_rdpkru", IX86_BUILTIN_RDPKRU, UNKNOWN, (int) UNSIGNED_FTYPE_VOID }, + { OPTION_MASK_ISA_PKU, CODE_FOR_wrpkru, "__builtin_ia32_wrpkru", IX86_BUILTIN_WRPKRU, UNKNOWN, (int) VOID_FTYPE_UNSIGNED } }; /* Builtins with variable number of arguments. */ diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index e69c9cc4563..7e6548bdcfd 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -158,6 +158,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_CLWB_P(x) TARGET_ISA_CLWB_P(x) #define TARGET_MWAITX TARGET_ISA_MWAITX #define TARGET_MWAITX_P(x) TARGET_ISA_MWAITX_P(x) +#define TARGET_PKU TARGET_ISA_PKU +#define TARGET_PKU_P(x) TARGET_ISA_PKU_P(x) + #define TARGET_LP64 TARGET_ABI_64 #define TARGET_LP64_P(x) TARGET_ABI_64_P(x) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5e5c97bf515..38191df12be 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -268,6 +268,8 @@ ;; For CLZERO support UNSPECV_CLZERO + ;; For RDPKRU and WRPKRU support + UNSPECV_PKU ]) ;; Constants to represent rounding modes in the ROUND instruction @@ -19320,6 +19322,48 @@ [(set_attr "type" "imov") (set_attr "mode" "")]) +;; RDPKRU and WRPKRU + +(define_expand "rdpkru" + [(parallel + [(set (match_operand:SI 0 "register_operand") + (unspec_volatile:SI [(match_dup 1)] UNSPECV_PKU)) + (set (match_dup 2) (const_int 0))])] + "TARGET_PKU" +{ + operands[1] = force_reg (SImode, const0_rtx); + operands[2] = gen_reg_rtx (SImode); +}) + +(define_insn "*rdpkru" + [(set (match_operand:SI 0 "register_operand" "=a") + (unspec_volatile:SI [(match_operand:SI 2 "register_operand" "c")] + UNSPECV_PKU)) + (set (match_operand:SI 1 "register_operand" "=d") + (const_int 0))] + "TARGET_PKU" + "rdpkru" + [(set_attr "type" "other")]) + +(define_expand "wrpkru" + [(unspec_volatile:SI + [(match_operand:SI 0 "register_operand") + (match_dup 1) (match_dup 2)] UNSPECV_PKU)] + "TARGET_PKU" +{ + operands[1] = force_reg (SImode, const0_rtx); + operands[2] = force_reg (SImode, const0_rtx); +}) + +(define_insn "*wrpkru" + [(unspec_volatile:SI + [(match_operand:SI 0 "register_operand" "a") + (match_operand:SI 1 "register_operand" "d") + (match_operand:SI 2 "register_operand" "c")] UNSPECV_PKU)] + "TARGET_PKU" + "wrpkru" + [(set_attr "type" "other")]) + (include "mmx.md") (include "sse.md") (include "sync.md") diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 730b753ba4b..5f83b3a94be 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -876,6 +876,10 @@ mclzero Target Report Mask(ISA_CLZERO) Var(ix86_isa_flags) Save Support CLZERO built-in functions and code generation. +mpku +Target Report Mask(ISA_PKU) Var(ix86_isa_flags) Save +Support PKU built-in functions and code generation. + mstack-protector-guard= Target RejectNegative Joined Enum(stack_protector_guard) Var(ix86_stack_protector_guard) Init(SSP_TLS) Use given stack-protector guard. diff --git a/gcc/config/i386/x86intrin.h b/gcc/config/i386/x86intrin.h index 9b292b35434..c8819eb7442 100644 --- a/gcc/config/i386/x86intrin.h +++ b/gcc/config/i386/x86intrin.h @@ -95,6 +95,8 @@ #include +#include + #endif /* __iamcu__ */ #endif /* _X86INTRIN_H_INCLUDED */ diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi index 883d9b334ab..4578925854d 100644 --- a/gcc/doc/extend.texi +++ b/gcc/doc/extend.texi @@ -18343,6 +18343,13 @@ All of them generate the machine instruction that is part of the name. void __builtin_i32_clzero (void *) @end smallexample +The following built-in functions are available when @option{-mpku} is used. +They generate reads and writes to PKRU. +@smallexample +void __builtin_ia32_wrpkru (unsigned int) +unsigned int __builtin_ia32_rdpkru () +@end smallexample + @node x86 transactional memory intrinsics @subsection x86 Transactional Memory Intrinsics diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index cad32c679b7..4e2cf8f7beb 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -1103,7 +1103,8 @@ See RS/6000 and PowerPC Options. -mpclmul -mfsgsbase -mrdrnd -mf16c -mfma @gol -mprefetchwt1 -mclflushopt -mxsavec -mxsaves @gol -msse4a -m3dnow -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop -mlzcnt @gol --mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx -mclzero -mthreads @gol +-mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx -mmwaitx -mclzero +-mpku -mthreads @gol -mms-bitfields -mno-align-stringops -minline-all-stringops @gol -minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol -mmemcpy-strategy=@var{strategy} -mmemset-strategy=@var{strategy} @gol @@ -22625,7 +22626,7 @@ AVX512CD instruction set support. @item skylake-avx512 Intel Skylake Server CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, -SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, +SSSE3, SSE4.1, SSE4.2, POPCNT, PKU, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA, BMI, BMI2, F16C, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVEC, XSAVES, AVX512F, AVX512VL, AVX512BW, AVX512DQ and AVX512CD instruction set support. @@ -23247,11 +23248,13 @@ preferred alignment to @option{-mpreferred-stack-boundary=2}. @need 200 @itemx -mclzero @opindex mclzero +@itemx -mpku +@opindex mpku These switches enable the use of instructions in the MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AVX2, AVX512F, AVX512PF, AVX512ER, AVX512CD, SHA, AES, PCLMUL, FSGSBASE, RDRND, F16C, FMA, SSE4A, FMA4, XOP, LWP, ABM, AVX512VL, AVX512BW, AVX512DQ, AVX512IFMA AVX512VBMI, BMI, BMI2, FXSR, -XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX or 3DNow!@: +XSAVE, XSAVEOPT, LZCNT, RTM, MPX, MWAITX, PKU or 3DNow!@: extended instruction sets. Each has a corresponding @option{-mno-} option to disable use of these instructions. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2002f929631..aa9355dc0e4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2015-12-24 Kirill Yukhin + + * g++.dg/other/i386-2.C: Add -mpku. + * g++.dg/other/i386-3.C: Ditto. + * gcc.target/i386/rdpku-1.c: New test. + * gcc.target/i386/sse-12.c: Add -mpku. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/sse-33.c: Ditto. + * gcc.target/i386/wrpku-1.c: New test. + 2015-12-23 Martin Sebor PR c++/69023 diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index 99caa10210e..74b3cb83bf8 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,9 +1,9 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, - popcntintrin.h, fmaintrin.h and mm_malloc.h.h are usable with + popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h.h are usable with -O -pedantic-errors. */ #include diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index 49b4484a98b..04ea372bce8 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,9 +1,9 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, - popcntintrin.h, fmaintrin.h and mm_malloc.h are usable with + popcntintrin.h, fmaintrin.h, pkuintrin.h and mm_malloc.h are usable with -O -fkeep-inline-functions. */ #include diff --git a/gcc/testsuite/gcc.target/i386/rdpku-1.c b/gcc/testsuite/gcc.target/i386/rdpku-1.c new file mode 100644 index 00000000000..044301c5f0f --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/rdpku-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mpku -O2" } */ +/* { dg-final { scan-assembler "rdpkru\n" } } */ + +#include + +unsigned extern +rdpku_test (void) +{ + return _rdpkru_u32 (); +} diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index 8b7ef6d960b..af15946b415 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 0592370ef26..1144e5d068b 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mclwb -mpcommit -mmwaitx -mclzero -mpku" } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 72017f5f681..9b155157b38 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -699,7 +699,7 @@ test_2 (_mm_clmulepi64_si128, __m128i, __m128i, __m128i, 1) /* x86intrin.h (FMA4/XOP/LWP/BMI/BMI2/TBM/LZCNT/FMA). */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,xsavec,xsaves,clflushopt,clwb,pcommit") +#pragma GCC target ("fma4,xop,lwp,bmi,bmi2,tbm,lzcnt,fma,rdseed,prfchw,adx,fxsr,xsaveopt,xsavec,xsaves,clflushopt,clwb,pcommit,pku") #endif #include /* xopintrin.h */ diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 45613547c42..d29d2d769f2 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -594,6 +594,6 @@ #define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D) #define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,pcommit,mwaitx,clzero") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,clwb,pcommit,mwaitx,clzero,pku") #include diff --git a/gcc/testsuite/gcc.target/i386/wrpku-1.c b/gcc/testsuite/gcc.target/i386/wrpku-1.c new file mode 100644 index 00000000000..44a4b720722 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/wrpku-1.c @@ -0,0 +1,11 @@ +/* { dg-do compile } */ +/* { dg-options "-mpku -O2" } */ +/* { dg-final { scan-assembler "wrpkru\n" } } */ + +#include + +void extern +wrpku_test (unsigned int key) +{ + _wrpkru (key); +} -- 2.30.2