From 421eeff4636ecc819c118b67136b97f0a922e6fd Mon Sep 17 00:00:00 2001 From: Christian Koenig Date: Thu, 20 Sep 2012 17:20:51 +0200 Subject: [PATCH] radeonsi: move draw cmds to si_commands.c MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Christian Koenig Reviewed-by: Michel Dänzer --- src/gallium/drivers/radeonsi/si_commands.c | 22 ++++++++++++++++++++ src/gallium/drivers/radeonsi/si_state.h | 5 +++++ src/gallium/drivers/radeonsi/si_state_draw.c | 22 +++++++------------- 3 files changed, 35 insertions(+), 14 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_commands.c b/src/gallium/drivers/radeonsi/si_commands.c index 5215a342f41..8dcf5d3341b 100644 --- a/src/gallium/drivers/radeonsi/si_commands.c +++ b/src/gallium/drivers/radeonsi/si_commands.c @@ -36,6 +36,28 @@ void si_cmd_context_control(struct si_pm4_state *pm4) si_pm4_cmd_end(pm4, false); } +void si_cmd_draw_index_2(struct si_pm4_state *pm4, uint32_t max_size, + uint64_t index_base, uint32_t index_count, + uint32_t initiator, bool predicate) +{ + si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_2); + si_pm4_cmd_add(pm4, max_size); + si_pm4_cmd_add(pm4, index_base); + si_pm4_cmd_add(pm4, (index_base >> 32UL) & 0xFF); + si_pm4_cmd_add(pm4, index_count); + si_pm4_cmd_add(pm4, initiator); + si_pm4_cmd_end(pm4, predicate); +} + +void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count, + uint32_t initiator, bool predicate) +{ + si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_AUTO); + si_pm4_cmd_add(pm4, count); + si_pm4_cmd_add(pm4, initiator); + si_pm4_cmd_end(pm4, predicate); +} + void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl) { si_pm4_cmd_begin(pm4, PKT3_SURFACE_SYNC); diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index 5e945ec25e0..4231c841b93 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -160,6 +160,11 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo); /* si_commands.c */ void si_cmd_context_control(struct si_pm4_state *pm4); +void si_cmd_draw_index_2(struct si_pm4_state *pm4, uint32_t max_size, + uint64_t index_base, uint32_t index_count, + uint32_t initiator, bool predicate); +void si_cmd_draw_index_auto(struct si_pm4_state *pm4, uint32_t count, + uint32_t initiator, bool predicate); void si_cmd_surface_sync(struct si_pm4_state *pm4, uint32_t cp_coher_cntl); #endif diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 2608ad0b360..db8f17fd36c 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -500,26 +500,20 @@ static void si_state_draw(struct r600_context *rctx, si_pm4_cmd_end(pm4, rctx->predicate_drawing); if (info->indexed) { + uint32_t max_size = (ib->buffer->width0 - ib->offset) / + rctx->index_buffer.index_size; uint64_t va; va = r600_resource_va(&rctx->screen->screen, ib->buffer); va += ib->offset; si_pm4_add_bo(pm4, (struct si_resource *)ib->buffer, RADEON_USAGE_READ); - si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_2); - si_pm4_cmd_add(pm4, (ib->buffer->width0 - ib->offset) / - rctx->index_buffer.index_size); - si_pm4_cmd_add(pm4, va); - si_pm4_cmd_add(pm4, (va >> 32UL) & 0xFF); - si_pm4_cmd_add(pm4, info->count); - si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_DMA); - si_pm4_cmd_end(pm4, rctx->predicate_drawing); + si_cmd_draw_index_2(pm4, max_size, va, info->count, + V_0287F0_DI_SRC_SEL_DMA, + rctx->predicate_drawing); } else { - si_pm4_cmd_begin(pm4, PKT3_DRAW_INDEX_AUTO); - si_pm4_cmd_add(pm4, info->count); - si_pm4_cmd_add(pm4, V_0287F0_DI_SRC_SEL_AUTO_INDEX | - (info->count_from_stream_output ? - S_0287F0_USE_OPAQUE(1) : 0)); - si_pm4_cmd_end(pm4, rctx->predicate_drawing); + uint32_t initiator = V_0287F0_DI_SRC_SEL_AUTO_INDEX; + initiator |= S_0287F0_USE_OPAQUE(!!info->count_from_stream_output); + si_cmd_draw_index_auto(pm4, info->count, initiator, rctx->predicate_drawing); } si_pm4_set_state(rctx, draw, pm4); } -- 2.30.2