From 422ad9d99e19ae05c09d2418b948c841e84312c4 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 16 Sep 2021 11:17:03 +0100 Subject: [PATCH] --- openpower/sv/svp64/appendix.mdwn | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/openpower/sv/svp64/appendix.mdwn b/openpower/sv/svp64/appendix.mdwn index fda504a3f..a556a8786 100644 --- a/openpower/sv/svp64/appendix.mdwn +++ b/openpower/sv/svp64/appendix.mdwn @@ -192,7 +192,11 @@ Looping which would terminate if the destination was marked as a Scalar. Scalar Reduction by contrast *keeps issuing Vector Element Operations* even though the destination register is marked as scalar. Thus it is up to the programmer to be aware of this and observe some -conventions. +conventions. It is also important to appreciate that there is no +actual imposition or restriction on how this mode is utilised: there +will therefore be several valuable uses (including Vector Iteration) +and it is up to the programmer to make best use of the capability +provided. In this mode, which is suited to operations involving carry or overflow, one register must be identified by the programmer as being the "accumulator". -- 2.30.2