From 4244b549845ae50580049a41ebd6364617831ba6 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sat, 13 Jun 2020 21:51:31 +1000 Subject: [PATCH] soc: Remove unused RESET_LOW generic Signed-off-by: Benjamin Herrenschmidt --- core_dram_tb.vhdl | 1 - core_flash_tb.vhdl | 1 - core_tb.vhdl | 1 - fpga/top-arty.vhdl | 1 - fpga/top-generic.vhdl | 1 - fpga/top-nexys-video.vhdl | 1 - soc.vhdl | 1 - 7 files changed, 7 deletions(-) diff --git a/core_dram_tb.vhdl b/core_dram_tb.vhdl index d72b1e7..592b4f4 100644 --- a/core_dram_tb.vhdl +++ b/core_dram_tb.vhdl @@ -61,7 +61,6 @@ begin SIM => true, MEMORY_SIZE => MEMORY_SIZE, RAM_INIT_FILE => MAIN_RAM_FILE, - RESET_LOW => false, HAS_DRAM => true, DRAM_SIZE => 256 * 1024 * 1024, DRAM_INIT_SIZE => ROM_SIZE, diff --git a/core_flash_tb.vhdl b/core_flash_tb.vhdl index 6575aa5..cb19b6f 100644 --- a/core_flash_tb.vhdl +++ b/core_flash_tb.vhdl @@ -38,7 +38,6 @@ begin SIM => true, MEMORY_SIZE => (384*1024), RAM_INIT_FILE => "main_ram.bin", - RESET_LOW => false, CLK_FREQ => 100000000, HAS_SPI_FLASH => true, SPI_FLASH_DLINES => 4, diff --git a/core_tb.vhdl b/core_tb.vhdl index ed147a3..bf69741 100644 --- a/core_tb.vhdl +++ b/core_tb.vhdl @@ -30,7 +30,6 @@ begin SIM => true, MEMORY_SIZE => (384*1024), RAM_INIT_FILE => "main_ram.bin", - RESET_LOW => false, CLK_FREQ => 100000000, HAS_SPI_FLASH => false ) diff --git a/fpga/top-arty.vhdl b/fpga/top-arty.vhdl index b13ed34..59181e0 100644 --- a/fpga/top-arty.vhdl +++ b/fpga/top-arty.vhdl @@ -128,7 +128,6 @@ begin generic map( MEMORY_SIZE => BRAM_SIZE, RAM_INIT_FILE => RAM_INIT_FILE, - RESET_LOW => RESET_LOW, SIM => false, CLK_FREQ => CLK_FREQUENCY, HAS_DRAM => USE_LITEDRAM, diff --git a/fpga/top-generic.vhdl b/fpga/top-generic.vhdl index 99e7253..ceaec90 100644 --- a/fpga/top-generic.vhdl +++ b/fpga/top-generic.vhdl @@ -75,7 +75,6 @@ begin generic map( MEMORY_SIZE => MEMORY_SIZE, RAM_INIT_FILE => RAM_INIT_FILE, - RESET_LOW => RESET_LOW, SIM => false, CLK_FREQ => CLK_FREQUENCY, DISABLE_FLATTEN_CORE => DISABLE_FLATTEN_CORE, diff --git a/fpga/top-nexys-video.vhdl b/fpga/top-nexys-video.vhdl index ec78c3e..3ba22b2 100644 --- a/fpga/top-nexys-video.vhdl +++ b/fpga/top-nexys-video.vhdl @@ -116,7 +116,6 @@ begin generic map( MEMORY_SIZE => BRAM_SIZE, RAM_INIT_FILE => RAM_INIT_FILE, - RESET_LOW => RESET_LOW, SIM => false, CLK_FREQ => CLK_FREQUENCY, HAS_DRAM => USE_LITEDRAM, diff --git a/soc.vhdl b/soc.vhdl index 7c8e825..f1f4e4d 100644 --- a/soc.vhdl +++ b/soc.vhdl @@ -30,7 +30,6 @@ entity soc is generic ( MEMORY_SIZE : natural; RAM_INIT_FILE : string; - RESET_LOW : boolean; CLK_FREQ : positive; SIM : boolean; DISABLE_FLATTEN_CORE : boolean := false; -- 2.30.2