From 424c77c26ed0aca25622745ca14b14eeb7d0895c Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 9 Dec 2016 20:35:18 +0100 Subject: [PATCH] re PR target/72742 (ICE in extract_insn, at recog.c:2309 (error: unrecognizable insn) w/ -Os -mlra) PR target/72742 * config/rs6000/rs6000.md (*and3_imm_mask_dot, *and3_imm_mask_dot2): Add rs6000_is_valid_and_mask to insn condition. * gcc.c-torture/compile/pr72742.c: New test. From-SVN: r243500 --- gcc/ChangeLog | 7 ++ gcc/config/rs6000/rs6000.md | 6 +- gcc/testsuite/ChangeLog | 5 ++ gcc/testsuite/gcc.c-torture/compile/pr72742.c | 79 +++++++++++++++++++ 4 files changed, 95 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr72742.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 269f785d7a1..b36a14c4b6e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2016-12-09 Jakub Jelinek + + PR target/72742 + * config/rs6000/rs6000.md (*and3_imm_mask_dot, + *and3_imm_mask_dot2): Add rs6000_is_valid_and_mask to insn + condition. + 2016-12-09 Segher Boessenkool PR target/78683 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 777b996991b..e4660023cde 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -3256,7 +3256,8 @@ (const_int 0))) (clobber (match_scratch:GPR 0 "=r,r"))] "(mode == Pmode || UINTVAL (operands[2]) <= 0x7fffffff) - && rs6000_gen_cell_microcode" + && rs6000_gen_cell_microcode + && rs6000_is_valid_and_mask (operands[2], mode)" "@ andi%e2. %0,%1,%u2 #" @@ -3281,7 +3282,8 @@ (and:GPR (match_dup 1) (match_dup 2)))] "(mode == Pmode || UINTVAL (operands[2]) <= 0x7fffffff) - && rs6000_gen_cell_microcode" + && rs6000_gen_cell_microcode + && rs6000_is_valid_and_mask (operands[2], mode)" "@ andi%e2. %0,%1,%u2 #" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2326b4e88ce..ac7abfd357b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-12-09 Jakub Jelinek + + PR target/72742 + * gcc.c-torture/compile/pr72742.c: New test. + 2016-12-09 Martin Sebor on arm-unknown-linux-gnueabi (and likely other ILP32) targets. diff --git a/gcc/testsuite/gcc.c-torture/compile/pr72742.c b/gcc/testsuite/gcc.c-torture/compile/pr72742.c new file mode 100644 index 00000000000..eedcd66b232 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr72742.c @@ -0,0 +1,79 @@ +/* PR target/72742 */ + +int a, b; +unsigned short int c; + +void +foo (int x, unsigned short int *y) +{ + int fx; + lab: + { + unsigned short int va; + if (x != 0) + { + c %= a < 0; + while (c < 17) + ++c; + b &= fx; + if ((a & (b != 0 ? *y : 0)) != 0) + { + va /= 3; + a += (va != 0) ? (va = a) : 0; + } + a = va && a; + goto lab; + y = &va; + } + } +} + +void +bar (int x, unsigned short int *y) +{ + int fx; + lab: + { + unsigned short int va; + if (x != 0) + { + c %= a < 0; + while (c < 17) + ++c; + b &= fx; + if ((a & (b != 0 ? *y : 24)) != 0) + { + va /= 3; + a += (va != 0) ? (va = a) : 0; + } + a = va && a; + goto lab; + y = &va; + } + } +} + +void +baz (int x, unsigned short int *y) +{ + int fx; + lab: + { + unsigned short int va; + if (x != 0) + { + c %= a < 0; + while (c < 17) + ++c; + b &= fx; + if ((a & (b != 0 ? *y : 25)) != 0) + { + va /= 3; + a += (va != 0) ? (va = a) : 0; + } + a = va && a; + goto lab; + y = &va; + } + } +} -- 2.30.2