From 42bc4e6be434b398d9edaff0ed10dfb5bf89b6a6 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Christian=20K=C3=B6nig?= Date: Mon, 15 Jun 2015 20:19:48 +0200 Subject: [PATCH] radeon/vce: make reloc offset signed MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit We need a negative offset for FW 50. Signed-off-by: Christian König Acked-by: Alex Deucher --- src/gallium/drivers/radeon/radeon_vce.c | 4 ++-- src/gallium/drivers/radeon/radeon_vce.h | 4 ++-- src/gallium/drivers/radeon/radeon_vce_40_2_2.c | 2 +- src/gallium/drivers/radeon/radeon_vce_50.c | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/gallium/drivers/radeon/radeon_vce.c b/src/gallium/drivers/radeon/radeon_vce.c index e53ef3f8486..0b667fd489b 100644 --- a/src/gallium/drivers/radeon/radeon_vce.c +++ b/src/gallium/drivers/radeon/radeon_vce.c @@ -217,7 +217,7 @@ struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc) * Calculate the offsets into the CPB */ void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot, - unsigned *luma_offset, unsigned *chroma_offset) + signed *luma_offset, signed *chroma_offset) { unsigned pitch = align(enc->luma->level[0].pitch_bytes, 128); unsigned vpitch = align(enc->luma->npix_y, 16); @@ -501,7 +501,7 @@ bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen) */ void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domain, - uint32_t offset) + signed offset) { int reloc_idx; diff --git a/src/gallium/drivers/radeon/radeon_vce.h b/src/gallium/drivers/radeon/radeon_vce.h index 28629043bc3..06e9868ca96 100644 --- a/src/gallium/drivers/radeon/radeon_vce.h +++ b/src/gallium/drivers/radeon/radeon_vce.h @@ -118,7 +118,7 @@ struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc); struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc); struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc); void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot, - unsigned *luma_offset, unsigned *chroma_offset); + signed *luma_offset, signed *chroma_offset); struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, const struct pipe_video_codec *templat, @@ -129,7 +129,7 @@ bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen); void rvce_add_buffer(struct rvce_encoder *enc, struct radeon_winsys_cs_handle *buf, enum radeon_bo_usage usage, enum radeon_bo_domain domain, - uint32_t offset); + signed offset); /* init vce fw 40.2.2 specific callbacks */ void radeon_vce_40_2_2_init(struct rvce_encoder *enc); diff --git a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c index ede540d7ac8..e64fbc7afb0 100644 --- a/src/gallium/drivers/radeon/radeon_vce_40_2_2.c +++ b/src/gallium/drivers/radeon/radeon_vce_40_2_2.c @@ -294,8 +294,8 @@ static void config(struct rvce_encoder *enc) static void encode(struct rvce_encoder *enc) { + signed luma_offset, chroma_offset; int i; - unsigned luma_offset, chroma_offset; enc->task_info(enc, 0x00000003, 0, 0, 0); diff --git a/src/gallium/drivers/radeon/radeon_vce_50.c b/src/gallium/drivers/radeon/radeon_vce_50.c index 377e1543186..5bf22194418 100644 --- a/src/gallium/drivers/radeon/radeon_vce_50.c +++ b/src/gallium/drivers/radeon/radeon_vce_50.c @@ -78,8 +78,8 @@ static void rate_control(struct rvce_encoder *enc) static void encode(struct rvce_encoder *enc) { + signed luma_offset, chroma_offset; int i; - unsigned luma_offset, chroma_offset; enc->task_info(enc, 0x00000003, 0, 0, 0); -- 2.30.2