From 42fea3622fee6175235b39fb4329d972fb554665 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Tue, 30 May 2017 10:26:09 +1000 Subject: [PATCH] mesa/st: indentation tidy-up Reviewed-by: Samuel Pitoiset --- src/mesa/state_tracker/st_mesa_to_tgsi.c | 65 ++++++++++++------------ 1 file changed, 32 insertions(+), 33 deletions(-) diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index aad3c5b04ca..984ff921300 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -938,42 +938,41 @@ st_translate_mesa_program( /* Declare misc input registers */ - { - GLbitfield sysInputs = program->info.system_values_read; - - for (i = 0; sysInputs; i++) { - if (sysInputs & (1 << i)) { - unsigned semName = _mesa_sysval_to_semantic(i); - - t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0); - - if (semName == TGSI_SEMANTIC_INSTANCEID || - semName == TGSI_SEMANTIC_VERTEXID) { - /* From Gallium perspective, these system values are always - * integer, and require native integer support. However, if - * native integer is supported on the vertex stage but not the - * pixel stage (e.g, i915g + draw), Mesa will generate IR that - * assumes these system values are floats. To resolve the - * inconsistency, we insert a U2F. - */ - struct st_context *st = st_context(ctx); - struct pipe_screen *pscreen = st->pipe->screen; - assert(procType == PIPE_SHADER_VERTEX); - assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, PIPE_SHADER_CAP_INTEGERS)); - (void) pscreen; /* silence non-debug build warnings */ - if (!ctx->Const.NativeIntegers) { - struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg); - ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]); - t->systemValues[i] = ureg_scalar(ureg_src(temp), 0); - } + GLbitfield sysInputs = program->info.system_values_read; + for (i = 0; sysInputs; i++) { + if (sysInputs & (1 << i)) { + unsigned semName = _mesa_sysval_to_semantic(i); + + t->systemValues[i] = ureg_DECL_system_value(ureg, semName, 0); + + if (semName == TGSI_SEMANTIC_INSTANCEID || + semName == TGSI_SEMANTIC_VERTEXID) { + /* From Gallium perspective, these system values are always + * integer, and require native integer support. However, if + * native integer is supported on the vertex stage but not the + * pixel stage (e.g, i915g + draw), Mesa will generate IR that + * assumes these system values are floats. To resolve the + * inconsistency, we insert a U2F. + */ + struct st_context *st = st_context(ctx); + struct pipe_screen *pscreen = st->pipe->screen; + assert(procType == PIPE_SHADER_VERTEX); + assert(pscreen->get_shader_param(pscreen, PIPE_SHADER_VERTEX, + PIPE_SHADER_CAP_INTEGERS)); + (void) pscreen; /* silence non-debug build warnings */ + if (!ctx->Const.NativeIntegers) { + struct ureg_dst temp = ureg_DECL_local_temporary(t->ureg); + ureg_U2F(t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), + t->systemValues[i]); + t->systemValues[i] = ureg_scalar(ureg_src(temp), 0); } + } - if (procType == PIPE_SHADER_FRAGMENT && - semName == TGSI_SEMANTIC_POSITION) - emit_wpos(st_context(ctx), t, program, ureg); + if (procType == PIPE_SHADER_FRAGMENT && + semName == TGSI_SEMANTIC_POSITION) + emit_wpos(st_context(ctx), t, program, ureg); - sysInputs &= ~(1 << i); - } + sysInputs &= ~(1 << i); } } -- 2.30.2