From 441c3515486bafb0ffb76d76dbd5480b31043414 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sat, 3 Sep 2022 12:18:30 +0100 Subject: [PATCH] --- openpower/sv/cr_ops.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/cr_ops.mdwn b/openpower/sv/cr_ops.mdwn index ddb408e33..68dcd8dab 100644 --- a/openpower/sv/cr_ops.mdwn +++ b/openpower/sv/cr_ops.mdwn @@ -81,7 +81,7 @@ SVP64 RM `MODE` (includes `ELWIDTH_SRC` bits) for CR-based operations: | 6 | 7 | 19-20 | 21 | 22 23 | description | | - | - |-------| --- |---------|----------------- | -|sz |SNZ| 0 RG | 0 | dz / | normal mode | +|sz |SNZ| 0 RG | 0 | dz / | simple mode | |sz |SNZ| 0 RG | 1 | 0 / | scalar reduce mode (mapreduce), SUBVL=1 | |zz |SNZ| 0 RG | 1 | 1 / | parallel reduce mode (mapreduce), SUBVL=1 | |zz |SNZ| 0 RG | 1 | SVM 0 | subvector reduce mode, SUBVL>1 | -- 2.30.2