From 44ea0e3bc87e186867b4f05e21d470aa429c4a38 Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 14 Oct 2018 05:49:05 +0100
Subject: [PATCH] replace % operator with rv_rem

---
 riscv/insns/rem.h         |  2 +-
 riscv/insns/remu.h        |  2 +-
 riscv/insns/remuw.h       |  2 +-
 riscv/insns/remw.h        |  2 +-
 riscv/sv_insn_redirect.cc | 10 ++++++++++
 riscv/sv_insn_redirect.h  |  2 ++
 6 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/riscv/insns/rem.h b/riscv/insns/rem.h
index 8587995..5464915 100644
--- a/riscv/insns/rem.h
+++ b/riscv/insns/rem.h
@@ -6,4 +6,4 @@ if(rhs == 0)
 else if(lhs == INT64_MIN && rhs == -1)
   WRITE_RD(0);
 else
-  WRITE_RD(sext_xlen(lhs % rhs));
+  WRITE_RD(sext_xlen(rv_rem(lhs, rhs)));
diff --git a/riscv/insns/remu.h b/riscv/insns/remu.h
index e74774c..8c59de6 100644
--- a/riscv/insns/remu.h
+++ b/riscv/insns/remu.h
@@ -4,4 +4,4 @@ reg_t rhs = zext_xlen(RS2);
 if(rhs == 0)
   WRITE_RD(sext_xlen(RS1));
 else
-  WRITE_RD(sext_xlen(lhs % rhs));
+  WRITE_RD(sext_xlen(rv_rem(lhs, rhs)));
diff --git a/riscv/insns/remuw.h b/riscv/insns/remuw.h
index b239c8f..7f30d0e 100644
--- a/riscv/insns/remuw.h
+++ b/riscv/insns/remuw.h
@@ -5,4 +5,4 @@ reg_t rhs = zext32(RS2);
 if(rhs == 0)
   WRITE_RD(sext32(lhs));
 else
-  WRITE_RD(sext32(lhs % rhs));
+  WRITE_RD(sext32(rv_rem(lhs, rhs)));
diff --git a/riscv/insns/remw.h b/riscv/insns/remw.h
index 56221cc..cf4bd4f 100644
--- a/riscv/insns/remw.h
+++ b/riscv/insns/remw.h
@@ -5,4 +5,4 @@ sreg_t rhs = sext32(RS2);
 if(rhs == 0)
   WRITE_RD(lhs);
 else
-  WRITE_RD(sext32(lhs % rhs));
+  WRITE_RD(sext32(rv_rem(lhs, rhs)));
diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc
index 1b8e4f2..4f0a103 100644
--- a/riscv/sv_insn_redirect.cc
+++ b/riscv/sv_insn_redirect.cc
@@ -237,6 +237,16 @@ reg_t sv_proc_t::rv_div(reg_t lhs, reg_t rhs)
     return lhs / rhs;
 }
 
+sreg_t sv_proc_t::rv_rem(sreg_t lhs, sreg_t rhs)
+{
+    return lhs % rhs;
+}
+
+reg_t sv_proc_t::rv_rem(reg_t lhs, reg_t rhs)
+{
+    return lhs % rhs;
+}
+
 reg_t sv_proc_t::rv_mul(reg_t lhs, reg_t rhs)
 {
     return lhs * rhs;
diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h
index af28646..5aeccd1 100644
--- a/riscv/sv_insn_redirect.h
+++ b/riscv/sv_insn_redirect.h
@@ -98,6 +98,8 @@ public:
     reg_t rv_sub(reg_t lhs, reg_t rhs);
     reg_t rv_div(reg_t lhs, reg_t rhs);
     sreg_t rv_div(sreg_t lhs, sreg_t rhs);
+    reg_t rv_rem(reg_t lhs, reg_t rhs);
+    sreg_t rv_rem(sreg_t lhs, sreg_t rhs);
     reg_t rv_mul(reg_t lhs, reg_t rhs);
     reg_t rv_and(reg_t lhs, reg_t rhs);
     reg_t rv_or(reg_t lhs, reg_t rhs);
-- 
2.30.2