From 4503683e7b8bd78080337b282688e1ad04628d45 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 17 Mar 2021 13:16:24 +0000 Subject: [PATCH] whoops shift has to be done at same bitwidth --- src/soc/decoder/isa/radixmmu.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/soc/decoder/isa/radixmmu.py b/src/soc/decoder/isa/radixmmu.py index fa03fa12..a376e3dc 100644 --- a/src/soc/decoder/isa/radixmmu.py +++ b/src/soc/decoder/isa/radixmmu.py @@ -392,7 +392,8 @@ class RADIX: if mbits < 5 or mbits > 16: print("badtree") return "badtree" - shift = shift - mbits + # reduce shift (has to be done at same bitwidth) + shift = shift - selectconcat(SelectableInt(0, 1), mbits) mask_size = mbits[1:5] # get 4 LSBs pgbase = selectconcat(data[8:56], SelectableInt(0, 8)) # shift up 8 return shift, mask_size, pgbase -- 2.30.2