From 450ad0e9ba031fbeef904746ca773e3b0e21af8f Mon Sep 17 00:00:00 2001
From: Eddie Hung <eddie@fpgeh.com>
Date: Fri, 22 Nov 2019 15:35:08 -0800
Subject: [PATCH] Add to CHANGELOG

---
 CHANGELOG | 1 +
 1 file changed, 1 insertion(+)

diff --git a/CHANGELOG b/CHANGELOG
index a49c27b05..d9d261fbc 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -53,6 +53,7 @@ Yosys 0.9 .. Yosys 0.9-dev
     - Added "check -mapped"
     - Added checking of SystemVerilog always block types (always_comb,
       always_latch and always_ff)
+    - Added "clkpart" pass
 
 Yosys 0.8 .. Yosys 0.9
 ----------------------
-- 
2.30.2