From 452a4a76f38ae43828802689282967f065044372 Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Sun, 3 Aug 2014 17:01:58 +0200 Subject: [PATCH] use verilog namespace to export mila configuration --- README | 4 ++-- miscope/mila.py | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/README b/README index 89510070..a2239f92 100644 --- a/README +++ b/README @@ -41,8 +41,8 @@ RangeDetector and EdgeDector terms not tested. [> Examples: Have a look at http://github.com/Florent-Kermarrec/misoc-de0nano -miio.py : Led & Switch Test controlled by Python Host. -mila.py : Logic Analyzer controlled by Python Host. +test_miio.py : Led & Switch Test controlled by Python Host. +test_mila.py : Logic Analyzer controlled by Python Host. [> Contact E-mail: florent@enjoy-digital.fr diff --git a/miscope/mila.py b/miscope/mila.py index 3edbdd90..7678a513 100644 --- a/miscope/mila.py +++ b/miscope/mila.py @@ -36,7 +36,7 @@ class MiLa(Module, AutoCSR): recorder_dat_source = self.rle.source self.comb += recorder_dat_source.connect(recorder.dat_sink) - def get_csv(self, layout): + def get_csv(self, layout, ns): r = "" def format_line(*args): return ",".join(args) + "\n" @@ -46,5 +46,5 @@ class MiLa(Module, AutoCSR): r += format_line("config", "with_rle", str(int(self.with_rle))) for e in layout: - r += format_line("layout", e.backtrace[-1][0], str(flen(e))) + r += format_line("layout", ns.get_name(e), str(flen(e))) return r -- 2.30.2