From 45986ed939d2187a03b6f55721e51e363968f5be Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Sat, 20 Jul 2019 19:34:06 +0200 Subject: [PATCH] rs6000: Make lwa_operand use any_memory_operand Testcase from comex, see https://lwn.net/Articles/793932/ . * config/rs6000/predicates.md (lwa_operand): Allow volatile memory. gcc/testsuite/ * gcc.target/powerpc/volatile-mem.c: New testcase. From-SVN: r273631 --- gcc/ChangeLog | 4 ++++ gcc/config/rs6000/predicates.md | 2 +- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.target/powerpc/volatile-mem.c | 16 ++++++++++++++++ 4 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/volatile-mem.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 58220e6d264..459c869796c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2019-07-20 Segher Boessenkool + + * config/rs6000/predicates.md (lwa_operand): Allow volatile memory. + 2019-07-20 Segher Boessenkool * config/rs6000/predicates.md (volatile_mem_operand): Modernize syntax. diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md index 13c7c02f27a..23d626bc0c4 100644 --- a/gcc/config/rs6000/predicates.md +++ b/gcc/config/rs6000/predicates.md @@ -929,7 +929,7 @@ if (gpc_reg_operand (inner, mode)) return true; - if (!memory_operand (inner, mode)) + if (!any_memory_operand (inner, mode)) return false; addr = XEXP (inner, 0); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index cd553db4b39..fc9b4c8d24f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2019-07-20 Segher Boessenkool + + * gcc.target/powerpc/volatile-mem.c: New testcase. + 2019-07-20 Jakub Jelinek PR target/91204 diff --git a/gcc/testsuite/gcc.target/powerpc/volatile-mem.c b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c new file mode 100644 index 00000000000..c8a7444b6c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/volatile-mem.c @@ -0,0 +1,16 @@ +/* { dg-options "-O2 -std=c11" } */ +/* { dg-require-effective-target lp64 } */ + +/* This tests if the instructions used for C atomic are optimised properly + as atomic by the target code, too. */ + +#include + +int load(_Atomic int *ptr) +{ + return atomic_load_explicit(ptr, memory_order_relaxed); +} + +/* There should be only two machine instructions, an lwa and a blr: */ +/* { dg-final { scan-assembler-times {(?n)^\s+[a-z]} 2 } } */ +/* { dg-final { scan-assembler-times {\mlwa\M} 1 } } */ -- 2.30.2