From 45991479a3f83501652240a66424a7b64a93e4d7 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Wed, 14 Jun 2017 22:27:20 -0700 Subject: [PATCH] i965/barrier: Do the correct flushes for texture updates Texture uploads and downloads may go through the render pipe which may result in texturing from or rendering to the texture or the PBO. We need to flush accordingly. Reviewed-by: Topi Pohjolainen Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_program.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 9ec2917c90e..3743fa9b5eb 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -268,8 +268,10 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield barriers) if (barriers & GL_TEXTURE_FETCH_BARRIER_BIT) bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE; - if (barriers & GL_TEXTURE_UPDATE_BARRIER_BIT) - bits |= PIPE_CONTROL_RENDER_TARGET_FLUSH; + if (barriers & (GL_TEXTURE_UPDATE_BARRIER_BIT | + GL_PIXEL_BUFFER_BARRIER_BIT)) + bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE | + PIPE_CONTROL_RENDER_TARGET_FLUSH); if (barriers & GL_FRAMEBUFFER_BARRIER_BIT) bits |= (PIPE_CONTROL_DEPTH_CACHE_FLUSH | -- 2.30.2