From 46213f676e6717931403b5936389161bb953cf77 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Wed, 30 Aug 2017 09:07:10 +0100 Subject: [PATCH] i965: drop brw->gt in favor of devinfo->gt MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Lionel Landwerlin Reviewed-by: Samuel Iglesias Gonsálvez Reviewed-by: Emil Velikov --- src/mesa/drivers/dri/i965/brw_context.c | 1 - src/mesa/drivers/dri/i965/brw_context.h | 2 -- src/mesa/drivers/dri/i965/brw_queryobj.c | 4 ++-- src/mesa/drivers/dri/i965/gen7_urb.c | 4 ++-- src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +- 5 files changed, 5 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index b8e4be90ab3..c8702cc4fe5 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -858,7 +858,6 @@ brwCreateContext(gl_api api, brw->screen = screen; brw->bufmgr = screen->bufmgr; - brw->gt = devinfo->gt; brw->is_g4x = devinfo->is_g4x; brw->is_baytrail = devinfo->is_baytrail; brw->is_haswell = devinfo->is_haswell; diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 6ff280d3b6c..a066396e8df 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -746,8 +746,6 @@ struct brw_context uint64_t max_gtt_map_object_size; - int gt; - bool is_g4x; bool is_baytrail; bool is_haswell; diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index 906a68ead1b..bd3f5738eba 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -95,7 +95,7 @@ brw_write_timestamp(struct brw_context *brw, struct brw_bo *query_bo, int idx) uint32_t flags = PIPE_CONTROL_WRITE_TIMESTAMP; - if (devinfo->gen == 9 && brw->gt == 4) + if (devinfo->gen == 9 && devinfo->gt == 4) flags |= PIPE_CONTROL_CS_STALL; brw_emit_pipe_control_write(brw, flags, @@ -111,7 +111,7 @@ brw_write_depth_count(struct brw_context *brw, struct brw_bo *query_bo, int idx) const struct gen_device_info *devinfo = &brw->screen->devinfo; uint32_t flags = PIPE_CONTROL_WRITE_DEPTH_COUNT | PIPE_CONTROL_DEPTH_STALL; - if (devinfo->gen == 9 && brw->gt == 4) + if (devinfo->gen == 9 && devinfo->gt == 4) flags |= PIPE_CONTROL_CS_STALL; if (devinfo->gen >= 10) { diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c index 0373f3a3a5c..a86a151a43f 100644 --- a/src/mesa/drivers/dri/i965/gen7_urb.c +++ b/src/mesa/drivers/dri/i965/gen7_urb.c @@ -72,7 +72,7 @@ gen7_allocate_push_constants(struct brw_context *brw) unsigned avail_size = 16; unsigned multiplier = - (devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 2 : 1; + (devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 2 : 1; int stages = 2 + gs_present + 2 * tess_present; @@ -181,7 +181,7 @@ gen7_upload_urb(struct brw_context *brw, unsigned vs_size, { const struct gen_device_info *devinfo = &brw->screen->devinfo; const int push_size_kB = - (devinfo->gen >= 8 || (brw->is_haswell && brw->gt == 3)) ? 32 : 16; + (devinfo->gen >= 8 || (brw->is_haswell && devinfo->gt == 3)) ? 32 : 16; /* BRW_NEW_{VS,TCS,TES,GS}_PROG_DATA */ struct brw_vue_prog_data *prog_data[4] = { diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c index 3c2dc954823..39fc8933571 100644 --- a/src/mesa/drivers/dri/i965/genX_state_upload.c +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c @@ -2551,7 +2551,7 @@ genX(upload_gs_state)(struct brw_context *brw) * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS * Stall" bit set. */ - if (brw->gt == 2 && brw->gs.enabled != active) + if (devinfo->gt == 2 && brw->gs.enabled != active) gen7_emit_cs_stall_flush(brw); #endif -- 2.30.2